公开(公告)号：US4954989A

公开(公告)日：1990-09-04

申请号：US335732

申请日：1989-04-10

Applicant: Andre-Jacques Auberton-Herve ,  Benoit Giffard

Inventor： Andre-Jacques Auberton-Herve ,  Benoit Giffard

IPC: G11C11/411 ,  G11C7/00 ,  G11C11/40 ,  H01L27/10

CPC classification number: G11C11/40 ,  G11C7/005

Abstract: A static memory cell of the metal-insulator-semiconductor type, which can be used in the microelectronics field for producing random access memories for storing binary information. This MIS type memory cell is a random access static memory cell known under the abbreviation SRAM. A bistable flip-flop is formed by a MIS transistor and a parasitic bipolar transistor. The source and drain of the MIS transistor respectively formed by constituting the emitter and collector of the bipolar transistor. The region of the channel of the MIS transistor located between the source and drain serves as the base for the bipolar transistor. The base is completely isolated from the outside of the memory cell. The gate electrode of the MIS transistor is electrically isolated from the region of the channel. There is an addressing circuit for the flip-flop for storing binary information in the form of the absence or presence of current.

Abstract translation: 金属 - 绝缘体 - 半导体类型的静态存储单元，其可以用于微电子领域中，用于产生用于存储二进制信息的随机存取存储器。 这种MIS型存储单元是在缩写SRAM下面已知的随机存取静态存储单元。 双稳态触发器由MIS晶体管和寄生双极晶体管形成。 分别通过构成双极晶体管的发射极和集电极形成的MIS晶体管的源极和漏极。 位于源极和漏极之间的MIS晶体管的沟道的区域用作双极晶体管的基极。 基座与存储单元的外部完全隔离。 MIS晶体管的栅电极与沟道的区域电隔离。 存在用于以不存在或存在电流的形式存储二进制信息的触发器的寻址电路。

公开(公告)号：US06429104B1

公开(公告)日：2002-08-06

申请号：US09600162

申请日：2000-09-18

Applicant: Andre-Jacques Auberton-Herve

Inventor： Andre-Jacques Auberton-Herve

IPC: H01L21425

CPC classification number: H01L21/76251 ,  H01L21/26506 ,  H01L21/76254 ,  Y10S438/977

Abstract: The invention concerns a method for treating substrates, in particular semiconductors, by implanting atoms so as to produce a substrate of cavities at a controlled depth, characterized in that it comprises steps which consists in: implanting atoms in the substrate at a first depth, to obtain a first concentration of atoms at said first depth; implanting atoms in the substrate at a second depth, different from the first, to obtain at said second depth, a second concentration of atoms, lower than the first; carrying out on the substrate a treatment for causing at least part of the atoms implanted in said second depth to migrate towards the first depth so as to create the cavities at the first depth preferably.

Abstract translation: 本发明涉及一种通过注入原子来处理底物，特别是半导体以在受控深度产生空腔的基底的方法，其特征在于其包括以下步骤：在第一深度将原子注入到基底中， 在所述第一深度处获得第一浓度的原子; 在与所述第一深度不同的第二深度处将所述原子注入到所述第二深度，以获得低于第一深度的第二浓度的原子; 在衬底上进行处理，使得在所述第二深度中注入的至少部分原子向第一深度移动，以便在第一深度优选地形成空腔。