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公开(公告)号：US07133470B2
公开(公告)日：2006-11-07
申请号：US10301235
申请日：2002-11-21
CPC分类号： H04L27/3854 , H04L2027/003 , H04L2027/0057 , H04L2027/0065 , H04L2027/0067
摘要： Receiver for receiving a received signal with a carrier frequency loop (18) which generates a carrier frequency deviation detection signal (TF) for detecting a carrier frequency of the received signal in a first carrier frequency capture range; a carrier phase loop (32) which generates a carrier phase deviation detection signal (TP) for detecting a carrier phase of the received signal, and settles when the carrier frequency deviation detection signal (TF) is within a second carrier frequency capture range; and with an offset control circuit (29) which changes the carrier frequency deviation detection signal (TF) and/or changes the second carrier frequency capture range by means of an offset control signal until a carrier phase lock detection circuit (21) indicates to the offset control circuit that the carrier phase offset of the received signal is less than an adjustable threshold value.
摘要翻译： 接收机，用于接收具有载波频率环路（18）的接收信号，所述载波频率环路（18）产生用于检测第一载波频率捕获范围内接收信号的载波频率的载波频率偏差检测信号（TF） 载波相位回路（32），其产生用于检测接收信号的载波相位的载波相位偏差检测信号（TP），并且当载波频率偏差检测信号（TF）在第二载波频率捕获范围内时， 以及通过偏移控制信号改变载波频率偏差检测信号（TF）和/或改变第二载波频率捕获范围的偏移控制电路（29），直到载波相位锁定检测电路（21）向 偏移控制电路，接收信号的载波相位偏移小于可调节的阈值。
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公开(公告)号：US09048846B2
公开(公告)日：2015-06-02
申请号：US13295293
申请日：2011-11-14
申请人： Andreas Menkhoff , Sdravko Boos
发明人： Andreas Menkhoff , Sdravko Boos
CPC分类号： H03L7/085 , H03L7/0991 , H03L7/1976
摘要： A device includes a digital-to-time converter and an interpolator having a data input and a data output coupled to the digital-to-time converter. The interpolator may be configured to receive a converter control signal at the data input and to provide an interpolated converter control signal at the data output. An interpolation rate of the interpolator may depend on the converter control signal.
摘要翻译： 一种设备包括数字 - 时间转换器和具有耦合到数字 - 时间转换器的数据输入和数据输出的内插器。 内插器可以被配置为在数据输入处接收转换器控制信号，并在数据输出端提供内插转换器控制信号。 内插器的内插速率可以取决于转换器控制信号。
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公开(公告)号：US07881405B2
公开(公告)日：2011-02-01
申请号：US11689839
申请日：2007-03-22
申请人： Andreas Menkhoff
发明人： Andreas Menkhoff
IPC分类号： H03K9/00
CPC分类号： H03H17/0664 , H03D3/007 , H03D2200/0056 , H03D2200/0062 , H03D2200/0082 , H03H17/0275
摘要： Some embodiments discussed relate to an apparatus and method for processing signals, comprising receiving an input signal and forming a stream of digital samples of the input signal by sampling at a sampling frequency and mixing the stream of digital samples using a mixer sequence having a sine sequence and a cosine sequence based on the sampling frequency to generate an input sequence, each of the sine sequence and the cosine sequence including a plurality of components in an arrangement such that at least one of the components has a zero value and the remaining components has a non-zero value, and filtering the input sequence using a plurality of polyphase filter parts, each corresponding to the non-zero components of the sine sequence and the cosine sequence, and selectively combining the outputs of the polyphase filter parts to generate an in-phase sequence and a quadrature sequence.
摘要翻译： 所讨论的一些实施例涉及一种用于处理信号的装置和方法，包括：以采样频率进行采样，接收输入信号并形成输入信号的数字采样流，并使用具有正弦序列的混频器序列混合数字采样流 以及基于所述采样频率产生输入序列的余弦序列，所述正弦序列和所述余弦序列中的每一个包括排列中的多个分量，使得所述分量中的至少一个具有零值，并且所述其余分量具有 使用多个多相滤波器部分对输入序列进行滤波，每个多相滤波器部分对应于正弦序列和余弦序列的非零分量，并且选择性地组合多相滤波器部分的输出， 相位序列和正交序列。
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公开(公告)号：US20090122930A1
公开(公告)日：2009-05-14
申请号：US11937606
申请日：2007-11-09
申请人： Andreas Menkhoff
发明人： Andreas Menkhoff
IPC分类号： H04B1/10
CPC分类号： H04B1/0483 , H03H17/0276 , H03H17/0294 , H03H2017/0295
摘要： An apparatus comprises a filter unit comprising a plurality of different filters each configured to filter a first signal when selected. The apparatus may further comprise a control unit configured to select one of the plurality of filters depending on a strength of the first signal. Related methods may also be performed.
摘要翻译： 一种装置包括滤波器单元，其包括多个不同的滤波器，每个滤波器被配置为当选择时对第一信号进行滤波。 该装置还可以包括控制单元，其被配置为根据第一信号的强度来选择多个滤波器中的一个。 还可以执行相关方法。
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公开(公告)号：US07496336B2
公开(公告)日：2009-02-24
申请号：US11260675
申请日：2005-10-27
申请人： Andreas Menkhoff
发明人： Andreas Menkhoff
IPC分类号： H04B1/06
CPC分类号： G05B13/024 , G05B11/42
摘要： For a weighting circuit for adjusting a feedback control loop to an input signal of the feedback control loop the feedback control loop comprises a system under control and a device for generating a control difference signal by subtracting a weighted feedback signal from the input signal. The control difference signal is fed to the system under control which generates an output signal. The output signal is multiplied, by means of a weighting circuit by a sequence of multiplication factors for generating the weighted feedback signal. A frequency bandwidth of the feedback control loop is reduced step by step by the sequence of multiplication factors.
摘要翻译： 对于用于将反馈控制回路调整到反馈控制回路的输入信号的加权电路，反馈控制回路包括受控制的系统和用于通过从输入信号中减去加权反馈信号来产生控制差分信号的装置。 控制差信号被输入到产生输出信号的控制下的系统。 输出信号通过加权电路乘以一系列乘法因子，用于产生加权反馈信号。 反馈控制环路的频率带宽逐步减少乘法因子序列。
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公开(公告)号：US20060023826A1
公开(公告)日：2006-02-02
申请号：US11173205
申请日：2005-07-01
申请人： Andreas Menkhoff
发明人： Andreas Menkhoff
IPC分类号： H03D3/24
CPC分类号： H04L27/0014 , H03D3/009 , H04L2027/0024
摘要： Carrier phase detector for calculation of a feedback signal (D) for a carrier phase loop in a receiver, which loop detects a phase error (Δφ) between a phase (φin) of a received signal (Ein), which comprises a sequence of received data symbols, and a nominal phase (φnom) of a nominal data symbol (Enom), with the carrier phase detector in each case calculating the feedback signal (D) as a function of the real part and of the imaginary part of a received data symbol (Ein) , with a received data symbol (Ein) whose phase is in a boundary phase area being weighted gradually to a lesser extent during the calculation of the feedback signal (D), with the boundary phase area in each case being arranged symmetrically with respect to a mid-phase (φmid) which is located in the centre between the two nominal phases (φnom) of equidistant nominal data symbols (Enom), and having a phase extent which is determined by a boundary phase (φg).
摘要翻译： 载波相位检测器，用于计算接收机中的载波相位回路的反馈信号（D），该回路检测接收信号（E）的相位（phi ）之间的相位误差（Deltaphi） 其包括接收到的数据符号的序列和标称数据符号（E SUB）的标称相位（phi ）， 其中载波相位检测器在每种情况下根据接收到的数据符号的实部和虚部的函数计算反馈信号（D），其中接收到的数据符号 在反馈信号（D）的计算期间，相位在边界相位区域中的相位（E
mid ）， / SUB>），并具有相位ext 其由边界相（phi> g>）确定。 -
公开(公告)号：US06822692B2
公开(公告)日：2004-11-23
申请号：US09944162
申请日：2001-08-30
申请人： Andreas Menkhoff
发明人： Andreas Menkhoff
IPC分类号： H03L700
CPC分类号： H03H17/0294
摘要： Digital filter for filtering a digital input signal with a variable filter length (l), it being possible to switch over the filter length (l) of the digital filter (8) as a function of a variable input clock frequency (fin) of the digital input signal without the ratio between the input clock frequency (fin) and an output clock frequency (fout) of the filtered digital output signal which is output by the digital filter (8) changing.
摘要翻译： 用于以可变滤波器长度（l）对数字输入信号进行滤波的数字滤波器，可以作为可变输入时钟频率（fin）的函数切换数字滤波器（8）的滤波器长度（l） 没有输入时钟频率（fin）与由数字滤波器（8）输出的滤波数字输出信号的输出时钟频率（fout）之间的比率发生变化的数字输入信号。
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公开(公告)号：US6137349A
公开(公告)日：2000-10-24
申请号：US110009
申请日：1998-07-02
申请人： Andreas Menkhoff , Herbert Alrutz
发明人： Andreas Menkhoff , Herbert Alrutz
CPC分类号： H03H17/0685 , H03H17/0621
摘要： A filter combination for sampling rate conversion is disclosed comprising a series combination of: an input low-pass filter (1) whose attenuation characteristic (tp1) has at least one first attenuation value (a1) in the vicinity of one-half and 1.5 times the frequency of a digitization clock (f1); a time-invariant interpolation filter (2) for increasing the number of samples from that of the first data sequence (d1) by an integral factor whose attenuation characteristic (tp2) has at least one second attenuation value (a2) in the vicinity of the frequency of the digitization clock (f1) and essentially at least one third attenuation value (a3) in the region between one-half and 1.5 times the frequency of the digitization clock; and a time-varying interpolation filter (3) for interpolating a data sequence (d5) provided at the output of the time-invariant interpolation filter (2), the attenuation characteristic (tp3) of the time-varying interpolation filter (3) having at least one fourth attenuation value (a4) in the vicinity of twice the frequency of the digitization clock (f1).
摘要翻译： 公开了一种用于采样率转换的滤波器组合，其包括以下的串联组合：其衰减特性（tp1）具有至少一个第一衰减值（a1）在一半和1.5倍附近的输入低通滤波器（1） 数字化时钟（f1）的频率; 用于将第一数据序列（d1）的样本数量增加到其衰减特性（tp2）在其附近的衰减特性（tp2）至少有一个第二衰减值（a2）的积分因子的时不变内插滤波器（2） 数字化时钟（f1）的频率和基本上在数字化时钟的频率的一半和1.5倍之间的区域中的至少一个第三衰减值（a3）; 以及时变内插滤波器（3），用于内插设置在时间不变插值滤波器（2）的输出端的数据序列（d5），时变内插滤波器（3）的衰减特性（tp3）具有 在数字化时钟（f1）的频率的两倍附近的至少四个衰减值（a4）。
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公开(公告)号：US5714918A
公开(公告)日：1998-02-03
申请号：US696032
申请日：1996-08-09
申请人： Andreas Menkhoff
发明人： Andreas Menkhoff
CPC分类号： H03G5/005 , H03G5/025 , H03H17/0266 , H03H17/0294
摘要： In an equalizer with n number of frequency ranges for digitized signals in which by means of n-1 cascaded filter circuits containing parallel connected digital low-pass filters and digital high pass filters whose respective frequency responses are linked by complementary transfer functions. A desired amplitude response is implemented via an increase or decrease in the amplitudes of adjacent frequency ranges in the associated filter circuit by weighting the outputs of the digital high-pass and low-pass filters, and a control unit forms the respective weighting factor from an equalizer control signal which contains the desired amplitude response as information.
摘要翻译： 在具有数字化信号的n个频率范围的均衡器中，其中通过包含并联连接的数字低通滤波器的n-1级联滤波器电路和其各个频率响应通过互补传递函数链接的数字高通滤波器。 通过对数字高通滤波器和低通滤波器的输出进行加权，通过相关滤波器电路中的相邻频率范围的振幅的增加或减小来实现期望的幅度响应，并且控制单元从 包含期望的振幅响应作为信息的均衡器控制信号。
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公开(公告)号：US09190983B2
公开(公告)日：2015-11-17
申请号：US13591516
申请日：2012-08-22
申请人： Andreas Menkhoff
发明人： Andreas Menkhoff
CPC分类号： H03H17/028 , H03H17/0433
摘要： A first stage of a digital filter receives input data to be filtered, the first stage of a digital filter operating at a first clock; a second stage of the digital filter outputs filtered output data, the second stage of the digital filter operating on a second clock, wherein a ratio of a frequency of the first clock and a frequency of the second clock is a fractional number, and a frequency of the second clock is higher than a frequency of the first clock; the first stage receives an indication of a ratio of the first clock and the second clock; and the first stage receives an indication of a time offset between (1) a clock pulse of the second clock, which occurs between a first clock pulse and a second clock pulse of the first clock, and (2) the first clock pulse of the first clock.
摘要翻译： 数字滤波器的第一级接收要被滤波的输入数据，在第一时钟操作的数字滤波器的第一级; 数字滤波器的第二级输出滤波输出数据，数字滤波器的第二级在第二时钟上工作，其中第一时钟的频率与第二时钟的频率的比率是小数，频率 的第二时钟的频率高于第一时钟的频率; 第一级接收第一时钟和第二时钟的比率的指示; 并且第一级接收在（1）在第一时钟的第一时钟脉冲和第一时钟脉冲之间发生的第二时钟的时钟脉冲之间的时间偏移的指示，以及（2）第一时钟的第一时钟脉冲 第一时钟
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