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公开(公告)号：US20140115259A1
公开(公告)日：2014-04-24
申请号：US14141992
申请日：2013-12-27
CPC分类号： G06F9/44505 , G06F1/10 , G06F1/32 , G06F1/3203 , G06F1/3206 , G06F1/3234 , G06F1/3237 , G06F1/324 , G06F1/3296 , G06F9/50 , G06F9/5094 , G06F12/0891 , Y02D10/128
摘要： An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
摘要翻译： 一种装置包括多个核心和耦合到核心的控制器。 如果基于与第二核心相关联的每个指令（CPI）的处理器时钟周期的第一数量高于第一阈值，则控制器将降低第一核心的工作点。 如果第一数量低于第二阈值，则控制器可操作以增加第一核心的工作点。
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公开(公告)号：US20100250998A1
公开(公告)日：2010-09-30
申请号：US12414504
申请日：2009-03-30
IPC分类号： G06F1/08
CPC分类号： G06F9/44505 , G06F1/10 , G06F1/32 , G06F1/3203 , G06F1/3206 , G06F1/3234 , G06F1/3237 , G06F1/324 , G06F1/3296 , G06F9/50 , G06F9/5094 , G06F12/0891 , Y02D10/128
摘要： An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
摘要翻译： 一种装置包括多个核心和耦合到核心的控制器。 如果基于与第二核心相关联的每个指令（CPI）的处理器时钟周期的第一数量高于第一阈值，则控制器将降低第一核心的工作点。 如果第一数量低于第二阈值，则控制器可操作以增加第一核心的工作点。
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公开(公告)号：US20130191666A1
公开(公告)日：2013-07-25
申请号：US13791089
申请日：2013-03-08
IPC分类号： G06F1/32
CPC分类号： G06F9/44505 , G06F1/10 , G06F1/32 , G06F1/3203 , G06F1/3206 , G06F1/3234 , G06F1/3237 , G06F1/324 , G06F1/3296 , G06F9/50 , G06F9/5094 , G06F12/0891 , Y02D10/128
摘要： An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
摘要翻译： 一种装置包括多个核心和耦合到核心的控制器。 如果基于与第二核心相关联的每个指令（CPI）的处理器时钟周期的第一数量高于第一阈值，则控制器将降低第一核心的工作点。 如果第一数量低于第二阈值，则控制器可操作以增加第一核心的工作点。
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公开(公告)号：US20130132969A1
公开(公告)日：2013-05-23
申请号：US13721794
申请日：2012-12-20
IPC分类号： G06F9/50
CPC分类号： G06F9/44505 , G06F1/10 , G06F1/32 , G06F1/3203 , G06F1/3206 , G06F1/3234 , G06F1/3237 , G06F1/324 , G06F1/3296 , G06F9/50 , G06F9/5094 , G06F12/0891 , Y02D10/128
摘要： An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
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公开(公告)号：US20120221874A1
公开(公告)日：2012-08-30
申请号：US13461956
申请日：2012-05-02
IPC分类号： G06F1/32
CPC分类号： G06F9/44505 , G06F1/10 , G06F1/32 , G06F1/3203 , G06F1/3206 , G06F1/3234 , G06F1/3237 , G06F1/324 , G06F1/3296 , G06F9/50 , G06F9/5094 , G06F12/0891 , Y02D10/128
摘要： An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
摘要翻译： 一种装置包括多个核心和耦合到核心的控制器。 如果基于与第二核心相关联的每个指令（CPI）的处理器时钟周期的第一数量高于第一阈值，则控制器将降低第一核心的工作点。 如果第一数量低于第二阈值，则控制器可操作以增加第一核心的工作点。
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公开(公告)号：US08190930B2
公开(公告)日：2012-05-29
申请号：US12414504
申请日：2009-03-30
CPC分类号： G06F9/44505 , G06F1/10 , G06F1/32 , G06F1/3203 , G06F1/3206 , G06F1/3234 , G06F1/3237 , G06F1/324 , G06F1/3296 , G06F9/50 , G06F9/5094 , G06F12/0891 , Y02D10/128
摘要： An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
摘要翻译： 一种装置包括多个核心和耦合到核心的控制器。 如果基于与第二核心相关联的每个指令（CPI）的处理器时钟周期的第一数量高于第一阈值，则控制器将降低第一核心的工作点。 如果第一数量低于第二阈值，则控制器可操作以增加第一核心的工作点。
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公开(公告)号：US20140215240A1
公开(公告)日：2014-07-31
申请号：US14227680
申请日：2014-03-27
IPC分类号： G06F1/32
CPC分类号： G06F9/44505 , G06F1/10 , G06F1/32 , G06F1/3203 , G06F1/3206 , G06F1/3234 , G06F1/3237 , G06F1/324 , G06F1/3296 , G06F9/50 , G06F9/5094 , G06F12/0891 , Y02D10/128
摘要： An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
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公开(公告)号：US08645728B2
公开(公告)日：2014-02-04
申请号：US13461956
申请日：2012-05-02
CPC分类号： G06F9/44505 , G06F1/10 , G06F1/32 , G06F1/3203 , G06F1/3206 , G06F1/3234 , G06F1/3237 , G06F1/324 , G06F1/3296 , G06F9/50 , G06F9/5094 , G06F12/0891 , Y02D10/128
摘要： An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
摘要翻译： 一种装置包括多个核心和耦合到核心的控制器。 如果基于与第二核心相关联的每个指令（CPI）的处理器时钟周期的第一数量高于第一阈值，则控制器将降低第一核心的工作点。 如果第一数量低于第二阈值，则控制器可操作以增加第一核心的工作点。
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9.发明授权Applying quality of service (QoS) to a translation lookaside buffer (TLB) 有权将服务质量（QoS）应用于翻译后备缓冲区（TLB）公开(公告)号：US07921276B2
公开(公告)日：2011-04-05
申请号：US11726316
申请日：2007-03-21
申请人： Ramesh Illikkal , Hari Kannan , Ravishankar Iyer , Donald Newell , Jaideep Moses , Li Zhao
发明人： Ramesh Illikkal , Hari Kannan , Ravishankar Iyer , Donald Newell , Jaideep Moses , Li Zhao
IPC分类号： G06F12/10
CPC分类号： G06F12/126
摘要： In one embodiment, the present invention includes a translation lookaside buffer (TLB) having storage locations each including a priority indicator field to store a priority level associated with an agent that requested storage of the data in the TLB, and an identifier field to store an identifier of the agent, where the TLB is apportioned according to a plurality of priority levels. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，本发明包括具有存储位置的翻译后备缓冲器（TLB），每个存储位置包括优先级指示符字段以存储与请求TLB中的数据存储的代理相关联的优先级，以及存储 代理商的标识符，其中TLB根据多个优先级分摊。 描述和要求保护其他实施例。
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公开(公告)号：US20060072563A1
公开(公告)日：2006-04-06
申请号：US10959488
申请日：2004-10-05
申请人： Greg Regnier , Vikram Saletore , Gary McAlpine , Ram Huggahalli , Ravishankar Iyer , Ramesh Illikkal , David Minturn , Donald Newell , Srihari Makineni
发明人： Greg Regnier , Vikram Saletore , Gary McAlpine , Ram Huggahalli , Ravishankar Iyer , Ramesh Illikkal , David Minturn , Donald Newell , Srihari Makineni
IPC分类号： H04L12/56
CPC分类号： H04L49/9094 , H04L49/90 , H04L49/9042 , H04L49/9063
摘要： In general, the disclosure describes a variety of techniques that can enhance packet processing operations.
摘要翻译： 通常，本公开描述了可以增强分组处理操作的各种技术。
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