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    Method for creating tensile strain by repeatedly applied stress memorization techniques
    1.
    发明授权
    Method for creating tensile strain by repeatedly applied stress memorization techniques 有权
    通过重复应力记忆技术产生拉伸应变的方法

    公开(公告)号：US07790537B2

    公开(公告)日：2010-09-07

    申请号：US11937677

    申请日：2007-11-09

    申请人： Andy Wei ,  Anthony Mowry ,  Andreas Gehring ,  Maciej Wiatr

    发明人： Andy Wei ,  Anthony Mowry ,  Andreas Gehring ,  Maciej Wiatr

    IPC分类号： H01L21/336

    CPC分类号： H01L29/7842 ,  H01L21/823807 ,  H01L21/823814 ,  H01L27/092 ,  H01L29/6656 ,  H01L29/7843

    摘要： By introducing additional strain-inducing mechanisms on the basis of stress memorization techniques, the performance of NMOS transistors may be significantly increased, thereby reducing the imbalance between PMOS transistors and NMOS transistors. By amorphizing and re-crystallizing the respective material in the presence of a mask layer at various stages of the manufacturing process, a drive current improvement of up to approximately 27% has been observed, with the potential for further performance gain.

    摘要翻译： 通过在应力记忆技术的基础上引入额外的应变诱导机制，可以显着增加NMOS晶体管的性能，从而减少PMOS晶体管和NMOS晶体管之间的不平衡。 通过在制造过程的不同阶段在掩模层的存在下使各种材料非晶化并再结晶，已经观察到高达约27％的驱动电流改善，具有进一步性能增益的潜力。

    METHOD OF FORMING A SEMICONDUCTOR STRUCTURE COMPRISING A FIELD EFFECT TRANSISTOR HAVING A STRESSED CHANNEL REGION
    5.
    发明申请
    METHOD OF FORMING A SEMICONDUCTOR STRUCTURE COMPRISING A FIELD EFFECT TRANSISTOR HAVING A STRESSED CHANNEL REGION 有权
    形成具有应力通道区域的场效应晶体管的半导体结构的方法

    公开(公告)号：US20080102590A1

    公开(公告)日：2008-05-01

    申请号：US11750816

    申请日：2007-05-18

    申请人： Andreas Gehring ,  Andy Wei ,  Anthony Mowry ,  Manuj Rathor

    发明人： Andreas Gehring ,  Andy Wei ,  Anthony Mowry ,  Manuj Rathor

    IPC分类号： H01L21/336 ,  H01L21/428

    CPC分类号： H01L29/7833 ,  H01L21/268 ,  H01L21/823807 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7843

    摘要： A method of forming a semiconductor structure comprises providing a semiconductor substrate comprising a first transistor element and a second transistor element. The first transistor element comprises at least one first amorphous region and the second transistor element comprises at least one second amorphous region. A stress-creating layer is formed over the first transistor element. The stress-creating layer does not cover the second transistor element. A first annealing process is performed. The first annealing process is adapted to re-crystallize the first amorphous region and the second amorphous region. After the first annealing process, a second annealing process is performed. The stress-creating layer remains on the semiconductor substrate during the second annealing process.

    摘要翻译： 形成半导体结构的方法包括提供包括第一晶体管元件和第二晶体管元件的半导体衬底。 第一晶体管元件包括至少一个第一非晶区，而第二晶体管元件包括至少一个第二非晶区。 应力产生层形成在第一晶体管元件上。 应力产生层不覆盖第二晶体管元件。 执行第一退火处理。 第一退火工艺适于重新结晶第一非晶区域和第二非晶区域。 在第一退火处理之后，进行第二退火处理。 应力产生层在第二退火工艺期间保留在半导体衬底上。