公开(公告)号：US20120159418A1

公开(公告)日：2012-06-21

申请号：US12972934

申请日：2010-12-20

申请人： Anthony D. Drumm ,  Frank J. Musante ,  Jagannathan Narasimhan ,  Louise H. Trevillyan

发明人： Anthony D. Drumm ,  Frank J. Musante ,  Jagannathan Narasimhan ,  Louise H. Trevillyan

IPC分类号： G06F17/50

CPC分类号： G06F17/505

摘要： A task-based multi-process design synthesis methodology relies on a plurality of child processes to assist a parent process in performing optimizations on an integrated circuit design. Objects from an integrated circuit design are grouped into subsets and assigned to child processes, with each child process performing a transform on each of the objects in the subset assigned to that child process and determining which of the objects in the subset are candidate objects for which performance of the transform has been successful. Each child process also provides result data to the parent process for each candidate object to reduce the overhead of the parent process when performing the transform on the candidate object. The result data, which may include, for example, a set of instructions or hints, may allow a parent process to take advantage of the efforts of the child process in performing the transform.

摘要翻译： 基于任务的多进程设计合成方法依赖于多个子进程来辅助父进程对集成电路设计进行优化。 来自集成电路设计的对象被分组成子集并被分配给子进程，每个子进程对分配给该子进程的子集中的每个对象执行变换，并且确定该子集中的哪些对象是候选对象 变革的表现已经取得成功。 每个子进程还将结果数据提供给每个候选对象的父进程，以便在对候选对象执行变换时减少父进程的开销。 可以包括例如一组指令或提示的结果数据可以允许父进程利用子进程执行变换的努力。

公开(公告)号：US08392866B2

公开(公告)日：2013-03-05

申请号：US12972934

申请日：2010-12-20

申请人： Anthony D. Drumm ,  Frank J. Musante ,  Jagannathan Narasimhan ,  Louise H. Trevillyan

发明人： Anthony D. Drumm ,  Frank J. Musante ,  Jagannathan Narasimhan ,  Louise H. Trevillyan

IPC分类号： G06F17/50

CPC分类号： G06F17/505

摘要： A task-based multi-process design synthesis methodology relies on a plurality of child processes to assist a parent process in performing optimizations on an integrated circuit design. Objects from an integrated circuit design are grouped into subsets and assigned to child processes, with each child process performing a transform on each of the objects in the subset assigned to that child process and determining which of the objects in the subset are candidate objects for which performance of the transform has been successful. Each child process also provides result data to the parent process for each candidate object to reduce the overhead of the parent process when performing the transform on the candidate object. The result data, which may include, for example, a set of instructions or hints, may allow a parent process to take advantage of the efforts of the child process in performing the transform.

摘要翻译： 基于任务的多进程设计合成方法依赖于多个子进程来辅助父进程对集成电路设计进行优化。 来自集成电路设计的对象被分组成子集并被分配给子进程，每个子进程对分配给该子进程的子集中的每个对象执行变换，并且确定该子集中的哪些对象是候选对象 变革的表现已经取得成功。 每个子进程还将结果数据提供给每个候选对象的父进程，以便在对候选对象执行变换时减少父进程的开销。 可以包括例如一组指令或提示的结果数据可以允许父进程利用子进程执行变换的努力。

公开(公告)号：US20120159406A1

公开(公告)日：2012-06-21

申请号：US12972980

申请日：2010-12-20

申请人： Anthony D. Drumm ,  Jagannathan Narasimhan ,  Lakshmi N. Reddy ,  Louise H. Trevillyan

发明人： Anthony D. Drumm ,  Jagannathan Narasimhan ,  Lakshmi N. Reddy ,  Louise H. Trevillyan

IPC分类号： G06F17/50

CPC分类号： G06F17/505

摘要： A task-based multi-process design synthesis methodology is reproducible, and relies on a plurality of child processes to assist a parent process in performing optimizations on an integrated circuit design. Objects from an integrated circuit design are grouped into subsets and assigned to child processes, with each child process performing a transform on each of the objects in the subset assigned to that child process and determining which of the objects in the subset are candidate objects for which performance of the transform has been successful. Each child process also undoes the transform performed for each object such that the same initial state of the integrated circuit design is used to perform each transform. In addition, the parent process tracks the results of performing the transform by each child process, and applies successful transforms in a controlled sequence.

摘要翻译： 基于任务的多进程设计合成方法是可重复的，并且依赖于多个子进程来辅助父进程对集成电路设计进行优化。 来自集成电路设计的对象被分组成子集并被分配给子进程，每个子进程对分配给该子进程的子集中的每个对象执行变换，并且确定该子集中的哪些对象是候选对象 变革的表现已经取得成功。 每个子进程还撤消对每个对象执行的变换，使得集成电路设计的相同初始状态被用于执行每个变换。 此外，父进程跟踪每个子进程执行变换的结果，并以受控序列应用成功的转换。

公开(公告)号：US08407652B2

公开(公告)日：2013-03-26

申请号：US12972879

申请日：2010-12-20

申请人： Anthony D. Drumm ,  Jagannathan Narasimhan ,  Lakshmi N. Reddy ,  Louise H. Trevillyan ,  Brian C. Wilson

发明人： Anthony D. Drumm ,  Jagannathan Narasimhan ,  Lakshmi N. Reddy ,  Louise H. Trevillyan ,  Brian C. Wilson

IPC分类号： G06F17/50

CPC分类号： G06F17/505

摘要： A task-based multi-process design synthesis methodology relies on a plurality of child processes to assist a parent process in performing optimizations on an integrated circuit design. Objects from an integrated circuit design are grouped into subsets and assigned to child processes, with each child process performing a transform on each of the objects in the subset assigned to that child process and determining which of the objects in the subset are candidate objects for which performance of the transform has been successful. The child processes then notify the parent process of those objects that qualify as candidate objects, so that the parent process only has to perform the transform on the candidate objects, thereby relieving the parent process from the overhead associated with performing the transform on non-candidate objects for which the transform has been determined by the child processes as not being successful.

摘要翻译： 基于任务的多进程设计合成方法依赖于多个子进程来辅助父进程对集成电路设计进行优化。 来自集成电路设计的对象被分组成子集并被分配给子进程，每个子进程对分配给该子进程的子集中的每个对象执行变换，并且确定该子集中的哪些对象是候选对象 变革的表现已经取得成功。 然后，子进程通知那些符合候选对象的那些对象的父进程，以便父进程只需对候选对象执行转换，从而将父进程从与非候选对象执行转换相关的开销中解除 子进程已将该转换确定为未成功的对象。

公开(公告)号：US08341565B2

公开(公告)日：2012-12-25

申请号：US12972980

申请日：2010-12-20

申请人： Anthony D. Drumm ,  Jagannathan Narasimhan ,  Lakshmi N. Reddy ,  Louise H. Trevillyan

发明人： Anthony D. Drumm ,  Jagannathan Narasimhan ,  Lakshmi N. Reddy ,  Louise H. Trevillyan

IPC分类号： G06F17/50

CPC分类号： G06F17/505

摘要： A task-based multi-process design synthesis methodology is reproducible, and relies on a plurality of child processes to assist a parent process in performing optimizations on an integrated circuit design. Objects from an integrated circuit design are grouped into subsets and assigned to child processes, with each child process performing a transform on each of the objects in the subset assigned to that child process and determining which of the objects in the subset are candidate objects for which performance of the transform has been successful. Each child process also undoes the transform performed for each object such that the same initial state of the integrated circuit design is used to perform each transform. In addition, the parent process tracks the results of performing the transform by each child process, and applies successful transforms in a controlled sequence.

摘要翻译： 基于任务的多进程设计合成方法是可重复的，并且依赖于多个子进程来辅助父进程对集成电路设计进行优化。 来自集成电路设计的对象被分组成子集并被分配给子进程，每个子进程对分配给该子进程的子集中的每个对象执行变换，并且确定该子集中的哪些对象是候选对象 变革的表现已经取得成功。 每个子进程还撤消对每个对象执行的变换，使得集成电路设计的相同初始状态被用于执行每个变换。 此外，父进程跟踪每个子进程执行变换的结果，并以受控序列应用成功的转换。

公开(公告)号：US20120159417A1

公开(公告)日：2012-06-21

申请号：US12972879

申请日：2010-12-20

申请人： Anthony D. Drumm ,  Jagannathan Narasimhan ,  Lakshmi N. Reddy ,  Louise H. Trevillyan ,  Brian C. Wilson

发明人： Anthony D. Drumm ,  Jagannathan Narasimhan ,  Lakshmi N. Reddy ,  Louise H. Trevillyan ,  Brian C. Wilson

IPC分类号： G06F17/50

CPC分类号： G06F17/505

摘要： A task-based multi-process design synthesis methodology relies on a plurality of child processes to assist a parent process in performing optimizations on an integrated circuit design. Objects from an integrated circuit design are grouped into subsets and assigned to child processes, with each child process performing a transform on each of the objects in the subset assigned to that child process and determining which of the objects in the subset are candidate objects for which performance of the transform has been successful. The child processes then notify the parent process of those objects that qualify as candidate objects, so that the parent process only has to perform the transform on the candidate objects, thereby relieving the parent process from the overhead associated with performing the transform on non-candidate objects for which the transform has been determined by the child processes as not being successful.

摘要翻译： 基于任务的多进程设计合成方法依赖于多个子进程来辅助父进程对集成电路设计进行优化。 来自集成电路设计的对象被分组成子集并被分配给子进程，每个子进程对分配给该子进程的子集中的每个对象执行变换，并且确定该子集中的哪些对象是候选对象 变革的表现已经取得成功。 然后，子进程通知那些符合候选对象的那些对象的父进程，以便父进程只需对候选对象执行转换，从而将父进程从与非候选对象执行转换相关的开销中解除 子进程已将该转换确定为未成功的对象。

公开(公告)号：US08271920B2

公开(公告)日：2012-09-18

申请号：US12868086

申请日：2010-08-25

申请人： Minsik Cho ,  Victor N. Kravets ,  Smita Krishnaswamy ,  Dorothy Kucar ,  Jagannathan Narasimhan ,  Ruchir Puri ,  Haifeng Qian ,  Haoxing Ren ,  Chin Ngai Sze ,  Louise H. Trevillyan ,  Hua Xiang ,  Matthew M. Ziegler

发明人： Minsik Cho ,  Victor N. Kravets ,  Smita Krishnaswamy ,  Dorothy Kucar ,  Jagannathan Narasimhan ,  Ruchir Puri ,  Haifeng Qian ,  Haoxing Ren ,  Chin Ngai Sze ,  Louise H. Trevillyan ,  Hua Xiang ,  Matthew M. Ziegler

IPC分类号： G06F17/50

CPC分类号： G06F17/5068

摘要： Exemplary embodiments include a computer implemented method for large block and structured synthesis, the method including determining initial design data from starting points for a synthesis flow, receiving user-directed structuring is incorporated into the synthesis flow, applying logical synthesis on the initial design data, applying a physical design on the initial design data, determining whether circuit design parameters have been met and in response to circuit design parameters not being met, adjusting the circuit design parameters.

摘要翻译： 示例性实施例包括用于大块和结构化合成的计算机实现的方法，所述方法包括从合成流的起点确定初始设计数据，接收用户导向的结构化被并入到合成流中，对初始设计数据应用逻辑合成， 对初始设计数据应用物理设计，确定电路设计参数是否已满足，并响应于电路设计参数不满足，调整电路设计参数。

公开(公告)号：US20120054699A1

公开(公告)日：2012-03-01

申请号：US12868086

申请日：2010-08-25

申请人： Minsik Cho ,  Victor N. Kravets ,  Smita Krishnaswamy ,  Dorothy Kucar ,  Jagannathan Narasimhan ,  Ruchir Puri ,  Haifeng Qian ,  Haoxing Ren ,  Chin Ngai Sze ,  Louise H. Trevillyan ,  Hua Xiang ,  Matthew M. Ziegler

发明人： Minsik Cho ,  Victor N. Kravets ,  Smita Krishnaswamy ,  Dorothy Kucar ,  Jagannathan Narasimhan ,  Ruchir Puri ,  Haifeng Qian ,  Haoxing Ren ,  Chin Ngai Sze ,  Louise H. Trevillyan ,  Hua Xiang ,  Matthew M. Ziegler

IPC分类号： G06F17/50

CPC分类号： G06F17/5068

摘要： Exemplary embodiments include a computer implemented method for large block and structured synthesis, the method including determining initial design data from starting points for a synthesis flow, receiving user-directed structuring is incorporated into the synthesis flow, applying logical synthesis on the initial design data, applying a physical design on the initial design data, determining whether circuit design parameters have been met and in response to circuit design parameters not being met, adjusting the circuit design parameters.

摘要翻译： 示例性实施例包括用于大块和结构化合成的计算机实现的方法，所述方法包括从合成流的起点确定初始设计数据，接收用户导向的结构化被并入到合成流中，对初始设计数据应用逻辑合成， 对初始设计数据应用物理设计，确定电路设计参数是否已满足，并响应于电路设计参数不满足，调整电路设计参数。

公开(公告)号：US07469395B2

公开(公告)日：2008-12-23

申请号：US11952544

申请日：2007-12-07

申请人： John M. Cohn ,  Alvar A. Dean ,  Amir H. Farrahi ,  David J. Hathaway ,  Thomas M. Lepsic ,  Jagannathan Narasimhan ,  Scott A. Tetreault ,  Sebastian T. Ventrone

发明人： John M. Cohn ,  Alvar A. Dean ,  Amir H. Farrahi ,  David J. Hathaway ,  Thomas M. Lepsic ,  Jagannathan Narasimhan ,  Scott A. Tetreault ,  Sebastian T. Ventrone

IPC分类号： G06F17/50

CPC分类号： G06F17/5072 ,  G06F17/5022 ,  G06F17/5077

摘要： An electrical wiring structure and a computer system for designing the electrical wiring structure. The electrical wiring structure includes a wire pair. The wire pair includes a first wire and a second wire. The second wire is slated for being tri-stated. The wire pair has a same-direction switching probability φSD per clock cycle that is no less than a pre-selected minimum same-direction switching probability φSD,MIN or has an opposite-direction switching probability φOD per clock cycle that is no less than a pre-selected minimum opposite-direction switching probability φOD,MIN. The first wire and the second wire satisfies at least one mathematical relationship involving LCOMMON and WSPACING, where WSPACING is defined as a spacing between the first wire and the second wire, and LCOMMON is defined as a common run length of the first wire and the second wire.

摘要翻译： 一种用于设计电气布线结构的电气布线结构和计算机系统。 电气配线结构包括电线对。 线对包括第一线和第二线。 第二根电线被预定为三态。 线对具有每时钟周期相同方向的切换概率phiSD，其不小于预先选择的最小相同方向切换概率phiSD，MIN或具有不小于a的每个时钟周期的相反方向切换概率phiOD 预先选择的最小相反方向切换概率phiOD，MIN。 第一线和第二线满足涉及LCOMMON和WSPACING的至少一个数学关系，其中WSPACING被定义为第一线和第二线之间的间隔，并且LCOMMON被定义为第一线和第二线的公共行程长度 线。

公开(公告)号：US20080074147A1

公开(公告)日：2008-03-27

申请号：US11952544

申请日：2007-12-07

申请人： John Cohn ,  Alvar Dean ,  Amir Farrahi ,  David Hathaway ,  Thomas Lepsic ,  Jagannathan Narasimhan ,  Scott Tetreault ,  Sebastian Ventrone

发明人： John Cohn ,  Alvar Dean ,  Amir Farrahi ,  David Hathaway ,  Thomas Lepsic ,  Jagannathan Narasimhan ,  Scott Tetreault ,  Sebastian Ventrone

IPC分类号： H03K19/00 ,  G06F17/50

CPC分类号： G06F17/5072 ,  G06F17/5022 ,  G06F17/5077

摘要： An electrical wiring structure and a computer system for designing the electrical wiring structure. The electrical wiring structure includes a wire pair. The wire pair includes a first wire and a second wire. The second wire is slated for being tri-stated. The wire pair has a same-direction switching probability φSD per clock cycle that is no less than a pre-selected minimum same-direction switching probability φSD,MIN or has an opposite-direction switching probability φOD per clock cycle that is no less than a pre-selected minimum opposite-direction switching probability φOD,MIN. The first wire and the second wire satisfies at least one mathematical relationship involving LCOMMON and WSPACING, where WSPACING is defined as a spacing between the first wire and the second wire, and LCOMMON is defined as a common run length of the first wire and the second wire.

摘要翻译： 一种用于设计电气布线结构的电气布线结构和计算机系统。 电气配线结构包括电线对。 线对包括第一线和第二线。 第二根电线被预定为三态。 线对具有不小于预先选择的最小相同方向切换概率phi，SD，MIN或/或具有相同方向的切换概率，每时钟周期 每个时钟周期的相反方向切换概率Φ不小于预先选择的最小相对方向切换概率φi，MIN 。 第一线和第二线满足至少一个数学关系，其涉及公平和平坦，其中，W SPACING 被定义为 第一线和第二线，以及公共被定义为第一线和第二线的公共行程长度。