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1.发明申请STORAGE IN CHARGE-TRAP MEMORY STRUCTURES USING ADDITIONAL ELECTRICALLY-CHARGED REGIONS 有权使用附加电费区的充电轨迹存储结构中的存储公开(公告)号：US20150200016A1
公开(公告)日：2015-07-16
申请号：US14457380
申请日：2014-08-12
Applicant: Apple Inc.
Inventor： Arik Rizel , Avraham Poza Meir , Yael Shur , Eyal Gurgi , Barak Baum
CPC classification number: G11C16/24 , G11C11/5671 , G11C16/0466 , G11C16/0475 , G11C16/10 , G11C16/26 , H01L27/11568 , H01L29/42328
Abstract: A device includes a memory and a read/write (R/W) unit. The memory includes multiple gates coupled to a common charge-trap layer. The R/W unit is configured to program and read the memory by creating and reading a set of electrically-charged regions in the common charge-trap layer, wherein at least a given region in the set is not uniquely associated with any single one of the gates.
Abstract translation: 一个设备包括一个存储器和一个读/写（R / W）单元。 存储器包括耦合到公共电荷陷阱层的多个门。 R / W单元被配置为通过在公共电荷陷阱层中创建和读取一组充电区域来对存储器进行编程和读取，其中集合中的至少一个给定区域不是唯一地与 大门。
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2.发明授权Storage in charge-trap memory structures using additional electrically-charged regions 有权使用额外的带电区域存储在电荷陷阱存储器结构中公开(公告)号：US09312017B2
公开(公告)日：2016-04-12
申请号：US14457380
申请日：2014-08-12
Applicant: Apple Inc.
Inventor： Arik Rizel , Avraham Poza Meir , Yael Shur , Eyal Gurgi , Barak Baum
IPC: G11C16/26 , G11C16/10 , G11C11/56 , G11C16/04 , H01L29/423 , H01L27/115
CPC classification number: G11C16/24 , G11C11/5671 , G11C16/0466 , G11C16/0475 , G11C16/10 , G11C16/26 , H01L27/11568 , H01L29/42328
Abstract: A device includes a memory and a read/write (R/W) unit. The memory includes multiple gates coupled to a common charge-trap layer. The R/W unit is configured to program and read the memory by creating and reading a set of electrically-charged regions in the common charge-trap layer, wherein at least a given region in the set is not uniquely associated with any single one of the gates.
Abstract translation: 一个设备包括一个存储器和一个读/写（R / W）单元。 存储器包括耦合到公共电荷陷阱层的多个门。 R / W单元被配置为通过在公共电荷陷阱层中创建和读取一组充电区域来对存储器进行编程和读取，其中集合中的至少一个给定区域不是唯一地与 大门。
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3.发明申请公开(公告)号：US20160189783A1
公开(公告)日：2016-06-30
申请号：US15066020
申请日：2016-03-10
Applicant: Apple Inc.
Inventor： Arik Rizel , Avraham Poza Meir , Yael Shur , Eyal Gurgi , Barak Baum
CPC classification number: G11C16/24 , G11C11/5671 , G11C16/0466 , G11C16/0475 , G11C16/10 , G11C16/26 , H01L27/11568 , H01L29/42328
Abstract: A device includes a memory and a read/write (R/W) unit. The memory includes multiple gates coupled to a common charge-trap layer. The R/W unit is configured to program and read the memory by creating and reading a set of electrically-charged regions in the common charge-trap layer, wherein at least a given region in the set is not uniquely associated with any single one of the gates.
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公开(公告)号：US09672925B2
公开(公告)日：2017-06-06
申请号：US15066020
申请日：2016-03-10
Applicant: Apple Inc.
Inventor： Arik Rizel , Avraham Poza Meir , Yael Shur , Eyal Gurgi , Barak Baum
IPC: G11C16/24 , G11C16/26 , G11C16/10 , G11C11/56 , G11C16/04 , H01L29/423 , H01L27/11568
CPC classification number: G11C16/24 , G11C11/5671 , G11C16/0466 , G11C16/0475 , G11C16/10 , G11C16/26 , H01L27/11568 , H01L29/42328
Abstract: A device includes a memory and a read/write (R/W) unit. The memory includes multiple gates coupled to a common charge-trap layer. The R/W unit is configured to program and read the memory by creating and reading a set of electrically-charged regions in the common charge-trap layer, wherein at least a given region in the set is not uniquely associated with any single one of the gates.
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