公开(公告)号：US11893413B2

公开(公告)日：2024-02-06

申请号：US17143149

申请日：2021-01-06

Applicant: Apple Inc.

Inventor： Michael D. Snyder ,  Ronald P. Hall ,  Deepak Limaye ,  Brett S. Feero ,  Rohit K. Gupta

IPC: G06F9/46 ,  G06F9/50

CPC classification number: G06F9/467 ,  G06F9/5016 ,  G06F9/5022

Abstract: An embodiment of an apparatus includes a processing circuit and a system memory. The processing circuit may store a pending request in a buffer, the pending request corresponding to a transaction that includes a write request to the system memory. The processing circuit may also allocate an entry in a write table corresponding the transaction. After sending the transaction to the system memory to be processed, the pending request in the buffer may be removed in response to the allocation of the write entry.

公开(公告)号：US11816484B2

公开(公告)日：2023-11-14

申请号：US17348565

申请日：2021-06-15

Applicant: Apple Inc.

Inventor： Jeffrey E. Gonion ,  Michael D. Snyder ,  Filip J. Pizlo

IPC: G06F9/30 ,  G06F9/455 ,  H04L9/08 ,  G06F21/53

CPC classification number: G06F9/30054 ,  G06F9/45516 ,  G06F21/53 ,  H04L9/0894 ,  G06F2221/033

Abstract: In an embodiment, dynamically-generated code may be supported in the system by ensuring that the code either remains executing within a predefined region of memory or exits to one of a set of valid exit addresses. Software embodiments are described in which the dynamically-generated code is scanned prior to permitting execution of the dynamically-generated code to ensure that various criteria are met including exclusion of certain disallowed instructions and control of branch target addresses. Hardware embodiments are described in which the dynamically-generated code is permitted to executed but is monitored to ensure that the execution criteria are met.

公开(公告)号：US20220083369A1

公开(公告)日：2022-03-17

申请号：US17143149

申请日：2021-01-06

Applicant: Apple Inc.

Inventor： Michael D. Snyder ,  Ronald P. Hall ,  Deepak Limaye ,  Brett S. Feero ,  Rohit K. Gupta

IPC: G06F9/46 ,  G06F9/50 ,  G06F9/54

Abstract: An embodiment of an apparatus includes a processing circuit and a system memory. The processing circuit may store a pending request in a buffer, the pending request corresponding to a transaction that includes a write request to the system memory. The processing circuit may also allocate an entry in a write table corresponding the transaction. After sending the transaction to the system memory to be processed, the pending request in the buffer may be removed in response to the allocation of the write entry.

公开(公告)号：US20250094355A1

公开(公告)日：2025-03-20

申请号：US18544110

申请日：2023-12-18

Applicant: Apple Inc.

Inventor： Brett S. Feero ,  Brian T. Mokrzycki ,  Jonathan Y. Tong ,  Michael D. Snyder ,  James N. Hardage

IPC: G06F12/1027

Abstract: Techniques are disclosed relating to using an instruction (e.g., a pre-translate instruction) to lock translations in TLB entries. The execution of the instruction may include storing translation information in a TLB entry, and setting an indication that the entry is locked. The processor circuitry may receive an invalidate command corresponding to the locked entry. Processor circuitry may, in response to the invalidate command and based on the indication that the entry is locked, maintain the locked entry in a valid state in the translation lookaside buffer circuitry, notwithstanding the invalidate command. Processor circuitry may be further configured to modify previously-stored data in a given entry to aggregate, in the entry, translation information for multiple regions of the second address space.

公开(公告)号：US20220137968A1

公开(公告)日：2022-05-05

申请号：US17348565

申请日：2021-06-15

Applicant: Apple Inc.

Inventor： Jeffrey E. Gonion ,  Michael D. Snyder ,  Filip J. Pizlo

IPC: G06F9/30 ,  H04L9/08 ,  G06F9/455

Abstract: In an embodiment, dynamically-generated code may be supported in the system by ensuring that the code either remains executing within a predefined region of memory or exits to one of a set of valid exit addresses. Software embodiments are described in which the dynamically-generated code is scanned prior to permitting execution of the dynamically-generated code to ensure that various criteria are met including exclusion of certain disallowed instructions and control of branch target addresses. Hardware embodiments are described in which the dynamically-generated code is permitted to executed but is monitored to ensure that the execution criteria are met.

公开(公告)号：US20240045678A1

公开(公告)日：2024-02-08

申请号：US18484582

申请日：2023-10-11

Applicant: Apple Inc.

Inventor： Jeffrey E. Gonion ,  Michael D. Snyder ,  Filip J. Pizlo

IPC: G06F9/30 ,  G06F9/455 ,  H04L9/08 ,  G06F21/53

CPC classification number: G06F9/30054 ,  G06F9/45516 ,  H04L9/0894 ,  G06F21/53 ,  G06F2221/033

Abstract: In an embodiment, dynamically-generated code may be supported in the system by ensuring that the code either remains executing within a predefined region of memory or exits to one of a set of valid exit addresses. Software embodiments are described in which the dynamically-generated code is scanned prior to permitting execution of the dynamically-generated code to ensure that various criteria are met including exclusion of certain disallowed instructions and control of branch target addresses. Hardware embodiments are described in which the dynamically-generated code is permitted to executed but is monitored to ensure that the execution criteria are met.