公开(公告)号：US20150033045A1

公开(公告)日：2015-01-29

申请号：US13948843

申请日：2013-07-23

Applicant: Apple Inc.

Inventor： Pankaj Raghuvanshi ,  Rohit Kumar ,  Suresh Periyacheri

IPC: G06F1/32

CPC classification number: G06F1/3234 ,  G06F1/3243 ,  G06F1/3287 ,  G06F9/3836 ,  G06F9/4893 ,  Y02D10/152 ,  Y02D10/171 ,  Y02D10/24

Abstract: An apparatus for performing instruction throttling for a computing system is disclosed. The apparatus may include a first counter, a second counter, and a control circuit. The second counter may be configured to increment in response to a determination that a processing cycle of a processor has completed. The control circuit may be configured to initialize the first and second counters, detect the processor has issued and instruction, decrement the first counter in response to the detection of the issued instruction, block the processor from issuing instructions dependent upon the a value of the first counter, reset the first counter dependent upon a value of the second counter, and reset the second counter in response to a determination that the value of the second counter is greater than a pre-determined value.

Abstract translation: 公开了一种用于对计算系统执行指令调节的装置。 该装置可以包括第一计数器，第二计数器和控制电路。 第二计数器可以被配置为响应于处理器的处理周期的确定已经完成而递增。 控制电路可以被配置为初始化第一和第二计数器，检测处理器已经发出和指令，响应于所发出的指令的检测而减小第一计数器，阻止处理器发出指令，取决于第一和第二计数器的值 计数器，根据第二计数器的值复位第一计数器，并且响应于第二计数器的值大于预定值的确定而复位第二计数器。

公开(公告)号：US09494997B2

公开(公告)日：2016-11-15

申请号：US14305514

申请日：2014-06-16

Applicant: Apple Inc.

Inventor： Kulin N. Kothari ,  Pradeep Kanapathipillai ,  Chetana N. Keltcher ,  Pankaj Raghuvanshi

IPC: G06F1/32 ,  G06F12/00 ,  G06F1/10

CPC classification number: G06F1/3237 ,  G06F1/10 ,  G06F1/3225 ,  G06F1/3275 ,  G06F11/34 ,  G06F12/00 ,  G06F12/0897 ,  G06F2201/885 ,  G06F2212/1016 ,  G06F2212/1028 ,  G06F2212/502 ,  Y02D10/128 ,  Y02D10/14

Abstract: In some embodiments, a system may include a sub-hierarchy clock control. In some embodiments, the system may include a master unit. The master unit may include an interface unit electrically coupled to a slave unit. The interface unit may monitor, during use, usage requests of the slave unit by the master unit. In some embodiments, the interface unit may turn off clocks to the slave unit during periods of nonuse. In some embodiments, the interface unit may determine if a predetermined period of time elapses before turning on clocks to the slave unit such that turning off the slave unit resulted in the system achieving greater efficiency. In some embodiments, the interface unit may maintain, during use, power to the slave unit during periods of nonuse. The interface unit may maintain power to the slave unit during periods of nonuse such that data stored in the slave unit is preserved.

Abstract translation: 在一些实施例中，系统可以包括子层次时钟控制。 在一些实施例中，系统可以包括主单元。 主单元可以包括电耦合到从单元的接口单元。 接口单元可以在使用期间由主单元监视从单元的使用请求。 在一些实施例中，接口单元可以在不使用期间关闭从单元的时钟。 在一些实施例中，接口单元可以确定在向从单元开启时钟之前是否经过预定时间段，使得关闭从单元导致系统实现更高的效率。 在一些实施例中，在使用期间，接口单元可以在不使用期间维持从单元的电力。 接口单元可以在不使用期间维持从单元的电力，从而保存存储在从单元中的数据。

公开(公告)号：US20150362978A1

公开(公告)日：2015-12-17

申请号：US14305514

申请日：2014-06-16

Applicant: Apple Inc.

Inventor： Kulin N. Kothari ,  Pradeep Kanapathipillai ,  Chetana N. Keltcher ,  Pankaj Raghuvanshi

IPC: G06F1/32

CPC classification number: G06F1/3237 ,  G06F1/10 ,  G06F1/3225 ,  G06F1/3275 ,  G06F11/34 ,  G06F12/00 ,  G06F12/0897 ,  G06F2201/885 ,  G06F2212/1016 ,  G06F2212/1028 ,  G06F2212/502 ,  Y02D10/128 ,  Y02D10/14

Abstract: In some embodiments, a system may include a sub-hierarchy clock control. In some embodiments, the system may include a master unit. The master unit may include an interface unit electrically coupled to a slave unit. The interface unit may monitor, during use, usage requests of the slave unit by the master unit. In some embodiments, the interface unit may turn off clocks to the slave unit during periods of nonuse. In some embodiments, the interface unit may determine if a predetermined period of time elapses before turning on clocks to the slave unit such that turning off the slave unit resulted in the system achieving greater efficiency. In some embodiments, the interface unit may maintain, during use, power to the slave unit during periods of nonuse. The interface unit may maintain power to the slave unit during periods of nonuse such that data stored in the slave unit is preserved.

Abstract translation: 在一些实施例中，系统可以包括子层次时钟控制。 在一些实施例中，系统可以包括主单元。 主单元可以包括电耦合到从单元的接口单元。 接口单元可以在使用期间由主单元监视从单元的使用请求。 在一些实施例中，接口单元可以在不使用期间关闭从单元的时钟。 在一些实施例中，接口单元可以确定在向从单元开启时钟之前是否经过预定时间段，使得关闭从单元导致系统实现更高的效率。 在一些实施例中，在使用期间，接口单元可以在不使用期间维持从单元的电力。 接口单元可以在不使用期间维持从单元的电力，从而保存存储在从单元中的数据。