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公开(公告)号:US20220416838A1
公开(公告)日:2022-12-29
申请号:US17900725
申请日:2022-08-31
Applicant: Apple Inc.
Inventor: Danyom Berhane , Brian B. Whitaker , Mohammad B. Vahid Far , Tracey L. Chavers
Abstract: An electronic device may include a transceiver, an antenna, and a front end module (FEM) coupled between the transceiver and antenna. Components on the FEM may operate on radio-frequency signals. The FEM may include a digital controller with a leakage management engine. The leakage management engine may monitor power supply voltages received by the FEM. In response to detection of a trigger condition, the leakage management engine may power off a set of the components while at least some of the FEM remains powered on. The trigger condition may be a change in the power supply voltages or a host command received from a host processor. Using the leakage management engine to power off the set of front end components may serve to minimize leakage current on the FEM, thereby maximizing battery life and shelf life for the device, without the use of bulky and expensive external load switches.
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公开(公告)号:US10332683B2
公开(公告)日:2019-06-25
申请号:US15717431
申请日:2017-09-27
Applicant: Apple Inc.
Inventor: Behzad Reyhani Masoleh , Ming Y. Tsai , Paul A. Martinez , Scott D. Morrison , Tracey L. Chavers
IPC: H01G4/248 , H01G4/30 , H01G4/002 , H01G4/224 , H05K1/02 , H05K1/18 , H05K1/11 , H01G4/232 , H05K3/34
Abstract: Capacitor devices with electrodes that are geometrically arranged to reduce parasitic capacitances are described. The capacitors may be multilayer ceramic capacitor (MLCC) structures in which certain electrodes may have a clearance from a capacitor structure wall, such as top wall. In circuits and devices where that particular capacitor wall may be placed near a shielding structure, the clearance may reduce unintended parasitic capacitances between the shield structure and the electrodes. As a result, the shield structures may be placed closer to the electronic components, which may allow circuit boards and electronic devices with a lower profile.
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公开(公告)号:US20240014847A1
公开(公告)日:2024-01-11
申请号:US18474042
申请日:2023-09-25
Applicant: Apple Inc.
Inventor: Danyom Berhane , Brian B. Whitaker , Mohammad B. Vahid Far , Tracey L. Chavers
CPC classification number: H04B1/525 , H04B1/0458 , H04B1/44 , H04B2001/0408
Abstract: An electronic device may include a transceiver, an antenna, and a front end module (FEM) coupled between the transceiver and antenna. Components on the FEM may operate on radio-frequency signals. The FEM may include a digital controller with a leakage management engine. The leakage management engine may monitor power supply voltages received by the FEM. In response to detection of a trigger condition, the leakage management engine may power off a set of the components while at least some of the FEM remains powered on. The trigger condition may be a change in the power supply voltages or a host command received from a host processor. Using the leakage management engine to power off the set of front end components may serve to minimize leakage current on the FEM, thereby maximizing battery life and shelf life for the device, without the use of bulky and expensive external load switches.
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公开(公告)号:US11539393B2
公开(公告)日:2022-12-27
申请号:US16988537
申请日:2020-08-07
Applicant: Apple Inc.
Inventor: Danyom Berhane , Brian B. Whitaker , Mohammad B. Vahid Far , Tracey L. Chavers
Abstract: An electronic device may include a transceiver, an antenna, and a front end module (FEM) coupled between the transceiver and antenna. Components on the FEM may operate on radio-frequency signals. The FEM may include a digital controller with a leakage management engine. The leakage management engine may monitor power supply voltages received by the FEM. In response to detection of a trigger condition, the leakage management engine may power off a set of the components while at least some of the FEM remains powered on. The trigger condition may be a change in the power supply voltages or a host command received from a host processor. Using the leakage management engine to power off the set of front end components may serve to minimize leakage current on the FEM, thereby maximizing battery life and shelf life for the device, without the use of bulky and expensive external load switches.
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公开(公告)号:US20190096581A1
公开(公告)日:2019-03-28
申请号:US15717431
申请日:2017-09-27
Applicant: Apple Inc.
Inventor: Behzad Reyhani Masoleh , Ming Y. Tsai , Paul A. Martinez , Scott D. Morrison , Tracey L. Chavers
CPC classification number: H01G4/248 , H01G2/22 , H01G4/002 , H01G4/005 , H01G4/224 , H01G4/232 , H01G4/30 , H05K1/0216 , H05K1/111 , H05K1/181 , H05K3/34 , H05K2201/10015 , H05K2201/10371
Abstract: Capacitor devices with electrodes that are geometrically arranged to reduce parasitic capacitances are described. The capacitors may be multilayer ceramic capacitor (MLCC) structures in which certain electrodes may have a clearance from a capacitor structure wall, such as top wall. In circuits and devices where that particular capacitor wall may be placed near a shielding structure, the clearance may reduce unintended parasitic capacitances between the shield structure and the electrodes. As a result, the shield structures may be placed closer to the electronic components, which may allow circuit boards and electronic devices with a lower profile.
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