公开(公告)号：US11929388B2

公开(公告)日：2024-03-12

申请号：US17894942

申请日：2022-08-24

Applicant: Apple Inc.

Inventor： Sandeep Chalasani ,  Steven E Molesa ,  Anatole Huang ,  Mahdi Farrokh Baroughi ,  Xia Li ,  Yongjie Jiang ,  Mittul Gupta ,  Stanley B Wang

IPC: H01L27/15 ,  G09G3/32 ,  H01L33/38 ,  H01L33/62

CPC classification number: H01L27/156 ,  G09G3/32 ,  H01L33/382 ,  H01L33/62 ,  G09G2300/06 ,  G09G2320/0626

Abstract: A display may be formed by an array of light-emitting diodes mounted to the surface of a display substrate. The light-emitting diodes may be inorganic light-emitting diodes formed from separate crystalline semiconductor structures. An array of pixel control circuits may be used to control light emission from the light-emitting diodes. Each pixel control circuit may be configured to control one or more respective passive matrices. To control partial pixel cells in the display, a donor pixel control circuit in a partial pixel cell may control the pixels in a receptor partial pixel cell without a pixel control circuit. To mitigate the size of an inactive area of the display, fanout signal lines for the display may be formed in the light-emitting active area of the display. The fanout signal lines may be formed between a row of pixel control circuits and a bottom edge of the light-emitting active area.

公开(公告)号：US20240012515A1

公开(公告)日：2024-01-11

申请号：US18212099

申请日：2023-06-20

Applicant: Apple Inc.

Inventor： Pablo Moreno Galbis ,  Xiang Lu ,  Bin Huang ,  Ling Zhang ,  Nikhil Acharya ,  Derek K. Shaeffer ,  Stanley B. Wang ,  Yongjie Jiang ,  Hopil Bae ,  Jiayi Jin ,  Ce Zhang ,  Young Don Bae ,  Giovanni Azzellino ,  Wooseung Yang ,  Mahdi Farrokh Baroughi ,  Weijun Yao ,  Rajesh Velayuthan ,  Eric A. Hildebrandt ,  Henry C. Jen

IPC: G06F3/041

CPC classification number: G06F3/0418 ,  G06F2203/04107 ,  G06F3/044

Abstract: Touch sensitive display technologies (e.g., integrated touch-display pixel-based systems) are evolving to contain more analog and digital circuits inside the panel itself instead of the traditionally simple thin-film transistors. This improves the display characteristics but makes those circuits more vulnerable to the impact of external ESD strikes, which can degrade the user experience. This disclosure describes a series of circuits and techniques to mitigate the impact of these discharges on front of screen artifacts and potential false touches. These circuits and techniques may include: performing configuration-only panel updates independently of the image refresh rate, improving the in-panel memory circuits to make them resistant to unexpected pin toggles via disabling of a write path in response to a read clock, implementing a pin corruption detector and implementing a supply injection detector.

公开(公告)号：US20230090344A1

公开(公告)日：2023-03-23

申请号：US17894942

申请日：2022-08-24

Applicant: Apple Inc.

Inventor： Sandeep Chalasani ,  Steven E Molesa ,  Anatole Huang ,  Mahdi Farrokh Baroughi ,  Xia Li ,  Yongjie Jiang ,  Mittul Gupta ,  Stanley B Wang

IPC: G09G3/32

Abstract: A display may be formed by an array of light-emitting diodes mounted to the surface of a display substrate. The light-emitting diodes may be inorganic light-emitting diodes formed from separate crystalline semiconductor structures. An array of pixel control circuits may be used to control light emission from the light-emitting diodes. Each pixel control circuit may be conred to control one or more respective passive matrices. To control partial pixel cells in the display, a donor pixel control circuit in a partial pixel cell may control the pixels in a receptor partial pixel cell without a pixel control circuit. To mitigate the size of an inactive area of the display, fanout signal lines for the display may be formed in the light-emitting active area of the display. The fanout signal lines may be formed between a row of pixel control circuits and a bottom edge of the light-emitting active area.

公开(公告)号：US11972070B1

公开(公告)日：2024-04-30

申请号：US17933068

申请日：2022-09-16

Applicant: Apple Inc.

Inventor： William Paul ,  Christoph H. Krah ,  Stanley B. Wang ,  Yongjie Jiang

IPC: G06F3/041

CPC classification number: G06F3/0412 ,  G06F3/04164

Abstract: Mitigation techniques can be used to reduce noise generated by wireless communication circuitry (e.g., near-field communication circuitry) in an electronic device including a display, touch, and wireless communication circuitry. In some examples, a touch screen can have a backplane including a mesh of routing traces connected to an array of chiplets. In some examples, the chiplets can repeat signals to prevent the accumulation of noise induced by an NFC coil. In some examples, the ratio between vertical and horizontal resistances of routing traces can be configured to mitigate noise induced by the coil. In some examples, the routing traces of the mesh can be configured to share a common geometric centroid. In some examples, a plurality of routing traces can be routed in a twisted pair configuration. In some examples, the routing traces and chiplets can be routed to minimize traversal through regions of relatively high electromagnetic field.

公开(公告)号：US20220100217A1

公开(公告)日：2022-03-31

申请号：US17033494

申请日：2020-09-25

Applicant: Apple Inc.

Inventor： Yongjie Jiang ,  Pablo Moreno-Galbis ,  Stanley Bo-Ting Wang

IPC: G05F1/575 ,  G05F1/59

Abstract: A voltage regulator circuit is disclosed. The voltage regulator includes a feedback circuit configured to generate a feedback signal based on a voltage level present on a regulated power supply node. A comparison circuit is arranged to generate an error signal based on the feedback signal and a reference voltage level. A compensation circuit is configured to modify the error signal, based on a routing impedance coupled between the regulated supply voltage node and a load circuit, to generate a control circuit. An output circuit of the voltage regulator is configured to source current to the regulated power supply node based on the control signal.

公开(公告)号：US20240105525A1

公开(公告)日：2024-03-28

申请号：US18358559

申请日：2023-07-25

Applicant: Apple Inc.

Inventor： Imran Hashim ,  Xiang Lu ,  Stanley B. Wang ,  Xuchun Liu ,  Mahdi Farrokh Baroughi ,  Yongjie Jiang ,  Hopil Bae ,  Hasan Akyol ,  Baris Posat ,  John T. Wetherell ,  Lei Wu

IPC: G09G3/32 ,  H01L25/075 ,  H01L33/62

CPC classification number: G09G3/32 ,  H01L25/0753 ,  H01L33/62 ,  H01L2933/0066

Abstract: Test structures and methods of testing pixel driver chip donor wafers are described. In an embodiment, a redistribution layer is formed over a pixel driver chip donor wafer and probed to determine known good dies, followed by removal of the RDL. In other embodiments, test routing is formed in the pixel driver chip using a polycide material or doped region in the semiconductor wafer.

公开(公告)号：US20240105089A1

公开(公告)日：2024-03-28

申请号：US18470290

申请日：2023-09-19

Applicant: Apple Inc.

Inventor： William Matthew Pender Paul ,  Mario Martinis ,  Jiayi Jin ,  Yongjie Jiang ,  Baris Posat ,  Mojtaba Fallahpour ,  Haitao Li ,  James G. Horiuchi ,  Giovanni Azzellino ,  Weijun Yao ,  Stanley B. Wang ,  Mahdi Farrokh Baroughi

IPC: G09G3/20

CPC classification number: G09G3/20 ,  G09G2310/08 ,  G09G2330/021

Abstract: Electronic displays and electronic devices including such electronic displays and antennas are provided for improved transmission of signals through circuitry of the electronic display. The electronic display may include multiple power supply tiles that are separated with non-conductive gaps to reduce circulation of eddy currents induced by the transmission signals. Moreover, voltage supply routing paths within the power supply tiles may be grouped to provide non-conductive gaps within the power supply tiles. Accordingly, the antenna may provide the transmission signals through the electronic display with improved efficiency based on reducing surface currents (e.g., eddy currents) on the electronic display.

公开(公告)号：US11635778B2

公开(公告)日：2023-04-25

申请号：US17033494

申请日：2020-09-25

Applicant: Apple Inc.

Inventor： Yongjie Jiang ,  Pablo Moreno-Galbis ,  Stanley Bo-Ting Wang

IPC: G05F1/575 ,  G05F1/59

Abstract: A voltage regulator circuit is disclosed. The voltage regulator includes a feedback circuit configured to generate a feedback signal based on a voltage level present on a regulated power supply node. A comparison circuit is arranged to generate an error signal based on the feedback signal and a reference voltage level. A compensation circuit is configured to modify the error signal, based on a routing impedance coupled between the regulated supply voltage node and a load circuit, to generate a control circuit. An output circuit of the voltage regulator is configured to source current to the regulated power supply node based on the control signal.