公开(公告)号：US20210280247A1

公开(公告)日：2021-09-09

申请号：US17329008

申请日：2021-05-24

Applicant: Applied Materials, Inc.

Inventor： Deepak Kamalanathan ,  Siddarth Krishnan ,  Archana Kumar ,  Fuxi Cai ,  Federico Nardi

IPC: G11C13/00

Abstract: A method for setting memory elements in a plurality of states includes applying a set signal to a memory element to transition the memory element from a low-current state to a high-current state; applying a partial reset signal to the memory element to transition the memory element from the high-current state to a state between the high-current state and the low-current state; determining whether the state corresponds to a predetermined state; and applying one or more additional partial reset signals to the memory element until the state corresponds to the predetermined current state. The memory element may be coupled in series with a transistor, and a voltage control circuit may apply voltages to the transistor to set and partially reset the memory element.

公开(公告)号：US11017856B1

公开(公告)日：2021-05-25

申请号：US16793794

申请日：2020-02-18

Applicant: Applied Materials, Inc.

Inventor： Deepak Kamalanathan ,  Siddarth Krishnan ,  Archana Kumar ,  Fuxi Cai ,  Federico Nardi

IPC: G11C11/00 ,  G11C13/00

Abstract: A method for setting memory elements in a plurality of states includes applying a set signal to a memory element to transition the memory element from a low-current state to a high-current state; applying a partial reset signal to the memory element to transition the memory element from the high-current state to a state between the high-current state and the low-current state; determining whether the state corresponds to a predetermined state; and applying one or more additional partial reset signals to the memory element until the state corresponds to the predetermined current state. The memory element may be coupled in series with a transistor, and a voltage control circuit may apply voltages to the transistor to set and partially reset the memory element.

公开(公告)号：US11948630B2

公开(公告)日：2024-04-02

申请号：US17518937

申请日：2021-11-04

Applicant: Applied Materials, Inc.

Inventor： Federico Nardi

IPC: G11C11/56 ,  G11C17/16 ,  G11C17/18

CPC classification number: G11C11/5678 ,  G11C11/5628 ,  G11C11/5642 ,  G11C17/16 ,  G11C17/18

Abstract: Memory cells in a memory array may be configured to include a fuse that will blow in the case of a defective cell. In a 1T-1R memory cell, a fuse may be placed in series with the select element and/or the memory element to counteract a short-circuit in either of these elements. A fuse may be formed by selectively etching a phase-change material (PCM) between two electrodes to leave a cavity. When sufficient energy is applied to the PCM material, the PCM filament will break its crystalline structure and be distributed within the cavity. This prevents the PCM material from recrystallizing. Another fuse may be formed by depositing a material between two electrodes that is doped with mobile ions. When subjected to an excessive signal, the resulting electric field may push these ions permanently towards one of the electrodes, thereby permanently destroying the conductive pathway.

公开(公告)号：US11790989B2

公开(公告)日：2023-10-17

申请号：US17329008

申请日：2021-05-24

Applicant: Applied Materials, Inc.

Inventor： Deepak Kamalanathan ,  Siddarth Krishnan ,  Archana Kumar ,  Fuxi Cai ,  Federico Nardi

IPC: G11C11/00 ,  G11C13/00

CPC classification number: G11C13/0097 ,  G11C13/004 ,  G11C13/0038 ,  G11C13/0069

Abstract: A method for setting memory elements in a plurality of states includes applying a set signal to a memory element to transition the memory element from a low-current state to a high-current state; applying a partial reset signal to the memory element to transition the memory element from the high-current state to a state between the high-current state and the low-current state; determining whether the state corresponds to a predetermined state; and applying one or more additional partial reset signals to the memory element until the state corresponds to the predetermined current state. The memory element may be coupled in series with a transistor, and a voltage control circuit may apply voltages to the transistor to set and partially reset the memory element.

公开(公告)号：US20230134437A1

公开(公告)日：2023-05-04

申请号：US17518937

申请日：2021-11-04

Applicant: Applied Materials, Inc.

Inventor： Federico Nardi

IPC: G11C11/56 ,  G11C17/18 ,  G11C17/16

Abstract: Memory cells in a memory array may be configured to include a fuse that will blow in the case of a defective cell. In a 1T-1R memory cell, a fuse may be placed in series with the select element and/or the memory element to counteract a short-circuit in either of these elements. A fuse may be formed by selectively etching a phase-change material (PCM) between two electrodes to leave a cavity. When sufficient energy is applied to the PCM material, the PCM filament will break its crystalline structure and be distributed within the cavity. This prevents the PCM material from recrystallizing. Another fuse may be formed by depositing a material between two electrodes that is doped with mobile ions. When subjected to an excessive signal, the resulting electric field may push these ions permanently towards one of the electrodes, thereby permanently destroying the conductive pathway.