PLASMA TREATMENT PROCESS TO DENSIFY OXIDE LAYERS

    公开(公告)号:US20230030436A1

    公开(公告)日:2023-02-02

    申请号:US17390151

    申请日:2021-07-30

    Abstract: Embodiments of the present disclosure generally relate to methods for gap fill deposition and film densification on microelectronic devices. The method includes forming an oxide layer containing silicon oxide and having an initial wet etch rate (WER) over features disposed on the substrate, and exposing the oxide layer to a first plasma treatment to produce a treated oxide layer. The first plasma treatment includes generating a first plasma by a first RF source and directing the first plasma to the oxide layer by a DC bias. The method also includes exposing the treated oxide layer to a second plasma treatment to produce a densified oxide layer. The second plasma treatment includes generating a second plasma by top and side RF sources and directing the second plasma to the treated oxide layer without a bias. The densified oxide layer has a final WER of less than one-half of the initial WER.

    PLASMA TREATMENT PROCESS TO DENSIFY OXIDE LAYERS

    公开(公告)号:US20240404823A1

    公开(公告)日:2024-12-05

    申请号:US18803673

    申请日:2024-08-13

    Abstract: Embodiments of the present disclosure generally relate to methods for gap fill deposition and film densification on microelectronic devices. The method includes forming an oxide layer containing silicon oxide and having an initial wet etch rate (WER) over features disposed on the substrate, and exposing the oxide layer to a first plasma treatment to produce a treated oxide layer. The first plasma treatment includes generating a first plasma and directing the first plasma to the oxide layer. The method also includes exposing the treated oxide layer to a second plasma treatment to produce a densified oxide layer. The second plasma treatment includes generating a second plasma and directing the second plasma to the treated oxide layer. The densified oxide layer has a final WER of less than one-half of the initial WER.

    HIGH-TEMPERATURE IMPLANT FOR GATE-ALL-AROUND DEVICES

    公开(公告)号:US20240404887A1

    公开(公告)日:2024-12-05

    申请号:US18327048

    申请日:2023-05-31

    Abstract: Approaches herein provide devices and methods for forming gate-all-around transistors with improved NBTI. One method may include forming a gate-all-around (GAA) stack including a plurality of alternating first layers and second layers, and forming a source/drain (S/D) cavity through the plurality of alternating first layers and second layers. The method may further include forming an inner spacer in the S/D cavity, adjacent the plurality of alternating first layers and second layers, performing a first implant by directing fluorine ions to the GAA stack, through the S/D cavity, and forming a S/D material in the S/D cavity following the first implant.

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