公开(公告)号：US20240282809A1

公开(公告)日：2024-08-22

申请号：US18171090

申请日：2023-02-17

Applicant: Applied Materials, Inc.

Inventor： Amirhasan NOURBAKHSH ,  Raman GAIRE ,  Pei LIU ,  Tyler SHERWOOD ,  Ryan Scott SMITH ,  Roger QUON ,  Siddarth KRISHNAN

IPC: H01L29/06 ,  H01L29/10 ,  H01L29/66

CPC classification number: H01L29/0619 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/66477

Abstract: A super junction device with an increased voltage rating may be formed by decreasing the width of the P-type region and increasing the doping concentration, while also increasing the height of the overall device. However, instead of etching a trench in the N-type material to fill with the P-type material, a trench may be etched for both the P-type region and an adjacent N-type region. This allows the height of the overall device to be increased while maintaining a feasible aspect ratio for the trench. The P-type material may then be formed as a sidewall liner on the trench that is relatively thin compared to the remaining width of the trench. The trench may then be filled with N-type material such that the P-type region fills the space between the N-type regions without any voids or seams, while having a width that would be unattainable using traditional etch-and-fill methods for the P-type region alone.

公开(公告)号：US20250151374A1

公开(公告)日：2025-05-08

申请号：US18887821

申请日：2024-09-17

Applicant: Applied Materials, Inc.

Inventor： Nicolas Louis BREIL ,  Lisa MCGILL ,  Manoj VELLAIKAL ,  Bocheng CAO ,  Pei LIU ,  Avgerinos V. GELATOS

IPC: H01L21/8238 ,  H01L23/66 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66

Abstract: A method of forming an electrical contact in a semiconductor structure includes performing a cavity shaping process on a semiconductor structures having an n-type metal oxide semiconductor (n-MOS) region and/or a p-type MOS (p-MOS) region, the cavity shaping process comprising forming an n-MOS cavity in an exposed surface of the n-MOS region and/or a p-MOS cavity in an exposed surface of the p-MOS region, wherein the cavity shaping process is configured to increase the surface area of the exposed surface of the n-MOS region or the p-MOS region. In some embodiments, the method includes performing a first selective deposition process to form a p-MOS cavity contact, selectively in the p-MOS cavity.