公开(公告)号：US20230176979A1

公开(公告)日：2023-06-08

申请号：US17541007

申请日：2021-12-02

Applicant: Arm Limited

Inventor： Alexander Cole SHULYAK ,  Joseph Michael PUSDESRIS ,  . ABHISHEK RAJA ,  Karthik SUNDARAM ,  Anoop Ramachandra IYER ,  Michael Brian SCHINZLER ,  James David DUNDAS ,  Yasuo ISHII

IPC: G06F12/1027

CPC classification number: G06F12/1027

Abstract: An apparatus comprises memory management circuitry to perform a translation table walk for a target address of a memory access request and to signal a fault in response to the translation table walk identifying a fault condition for the target address, prefetch circuitry to generate a prefetch request to request prefetching of information associated with a prefetch target address to a cache; and faulting address prediction circuitry to predict whether the memory management circuitry would identify the fault condition for the prefetch target address if the translation table walk was performed by the memory management circuitry for the prefetch target address. In response to a prediction that the fault condition would be identified for the prefetch target address, the prefetch circuitry suppresses the prefetch request and the memory management circuitry prevents the translation table walk being performed for the prefetch target address of the prefetch request.

公开(公告)号：US20220147459A1

公开(公告)日：2022-05-12

申请号：US17093792

申请日：2020-11-10

Applicant: Arm Limited

Inventor： Alexander Cole SHULYAK ,  Adrian MONTERO ,  Joseph Michael PUSDESRIS ,  Karthik SUNDARAM ,  Yasuo ISHII

IPC: G06F12/0862

Abstract: Data processing apparatuses and methods of processing data are disclosed. The operations comprise: storing copies of data items; and storing, in a producer pattern history table, a plurality of producer-consumer relationships, each defining an association between producer load indicator and a plurality of consumer load entries, each consumer load entry comprising a consumer load indicator and one or more usefulness metrics. Further steps comprise: initiating, in response to a data load from an address corresponding to the producer load indicator in the producer pattern history table and when at least one of the corresponding one or more usefulness meets a criterion, a producer prefetch of data to be prefetched for storing as a local copy; and issuing, when the data is returned, one or more consumer prefetches to return consumer data from a consumer address generated from the data returned by the producer prefetch and a consumer load indicator of a consumer load entry.

公开(公告)号：US20230229596A1

公开(公告)日：2023-07-20

申请号：US17579842

申请日：2022-01-20

Applicant: Arm Limited

Inventor： Alexander Cole SHULYAK ,  Balaji VIJAYAN ,  Karthik SUNDARAM ,  Yasuo ISHII ,  Joseph Michael PUSDESRIS

IPC: G06F12/0862

CPC classification number: G06F12/0862 ,  G06F2212/1024 ,  G06F2212/602

Abstract: Indirect prefetch circuitry initiates a producer prefetch requesting return of producer data having a producer address and at least one consumer prefetch to request prefetching of consumer data having a consumer address derived from the producer data. A producer prefetch filter table stores producer filter entries indicative of previous producer addresses of previous producer prefetches. Initiation of a requested producer prefetch for producer data having a requested producer address is suppressed when a lookup of the producer prefetch filter table determines that the requested producer address hits against a producer filter entry of the table. The lookup of the producer prefetch filter table for the requested producer address depends on a subset of bits of the requested producer address including at least one bit which distinguishes different chunks of data within a same cache line.

公开(公告)号：US20230176973A1

公开(公告)日：2023-06-08

申请号：US17545121

申请日：2021-12-08

Applicant: Arm Limited

Inventor： Alexander Cole SHULYAK ,  Karthik SUNDARAM

IPC: G06F12/0862 ,  G06N20/00

CPC classification number: G06F12/0862 ,  G06N20/00 ,  G06F2212/602

Abstract: Prefetch generation circuitry generates requests to prefetch data to a cache, where the prefetch generation circuitry is configured to initiate a producer prefetch to request return of producer data having a producer address and to initiate at least one consumer prefetch to request prefetching of consumer data to the cache, the consumer data having an address derived from the producer data returned in response to the producer prefetch. Training circuitry updates, based on executed load operations, a training table indicating candidate producer-consumer relationships being trained for use by the prefetch generation circuitry in generating the producer/consumer prefetches. Replacement control circuitry controls replacement of candidate producer-consumer relationships based on a producer-data-consumer-operand (PD-CO) match-based replacement policy criterion, which depends on whether a PD-CO match condition, indicative of the producer data for a producer load matching an address operand of a consumer load, is satisfied for existing/new candidate producer-consumer relationships.