公开(公告)号：US10748236B2

公开(公告)日：2020-08-18

申请号：US16117098

申请日：2018-08-30

Applicant: ARM Limited

Inventor： Stephane Forey ,  Isidoros Sideris ,  Reimar Gisbert Döffinger

IPC: G06F1/20 ,  G06F9/38 ,  G06T1/20 ,  G06F9/52 ,  G06F9/48

Abstract: A warp processing unit controls, in dependence on a warp program counter shared between a plurality of threads processing respective graphics fragments, fetching of a next instruction to be executed for at least some of the plurality of threads. In response to a determination that a given subset of threads is to be discarded when at least one other subset of threads is to continue, the warp processing unit processes the given subset of threads in a discarded state. For a thread processed in the discarded state, execution of instructions continues for the discarded thread, and at least one of: generation of data access messages triggered by the discarded thread is suppressed; and at least one processing operation, which would be deferred until completion of the discarded thread had the thread not been discarded, is enabled to be commenced independently of an outcome of the discarded thread.

公开(公告)号：US11276137B1

公开(公告)日：2022-03-15

申请号：US17201229

申请日：2021-03-15

Applicant: Arm Limited

Inventor： Isidoros Sideris ,  Stephane Forey ,  William Robert Stoye ,  John David Robson

IPC: G06T1/20 ,  G06T1/60

Abstract: There is provided a graphics processor comprising a programmable execution unit operable to execute programs for respective execution thread groups. An eviction checking circuit is provided that is configured to check instructions as they are being fetched for execution from an instruction cache to determine whether the instruction includes any conditional eviction conditions that if not met indicate that the program to which the instruction relates should not continue to be executed for the group of execution threads. The eviction checking circuit is then configured to check whether any conditional eviction conditions are satisfied at this point and either allow the execution unit to continue program execution or cause the thread group to be evicted.

公开(公告)号：US10789768B2

公开(公告)日：2020-09-29

申请号：US16128807

申请日：2018-09-12

Applicant: ARM Limited

Inventor： Stephane Forey ,  Jørn Nystad ,  Reimar Gisbert Döffinger ,  Kenneth Edvard Østby ,  Toni Viki Brkic

IPC: G06T15/40 ,  G06T15/00 ,  G06F9/48 ,  G06T15/80

Abstract: A graphics processing apparatus comprises fragment generating circuitry to generate graphics fragments corresponding to graphics primitives, thread processing circuitry to perform threads of processing corresponding to the fragments, and forward kill circuitry to trigger a forward kill operation to prevent further processing of a target thread of processing corresponding to an earlier graphics fragment when the forward kill operation is enabled for the target thread and the earlier graphics fragment is determined to be obscured by one or more later graphics fragments. The thread processing circuitry supports enabling of the forward kill operation for a thread including at least one forward kill blocking instruction having a property indicative that the forward kill operation should be disabled for the given thread, when the thread processing circuitry has not yet reached a portion of the thread including the at least one forward kill blocking instruction.