公开(公告)号：US09665510B2

公开(公告)日：2017-05-30

申请号：US14580158

申请日：2014-12-22

申请人： Arvind Kaushik ,  Peter Z. Rashev ,  Amrit P. Singh ,  Akshat Mittal

发明人： Arvind Kaushik ,  Peter Z. Rashev ,  Amrit P. Singh ,  Akshat Mittal

IPC分类号： G06F13/24 ,  G06F13/28 ,  H03F1/32 ,  H04B1/04

CPC分类号： G06F13/24 ,  G06F13/28 ,  H03F1/3247 ,  Y02D10/14

摘要： A system for storing pre-distorted output samples in a memory includes a sample counter, a programming interface module, and a comparator. The sample counter counts the pre-distorted output samples, generates a dynamic count value, receives a capture counter status signal, and generates a first count value. The programming interface module receives and outputs the first count value, an offset value, and a capture control signal, and generates a first interrupt signal. The comparator receives the first count value, the offset value, the dynamic count value, and the capture control signal, generates a final value, compares the final value with the dynamic count value, and generates a trigger signal when the final value equals the dynamic count value based on the capture control signal. The trigger signal initiates the storing of the pre-distorted output samples in the memory.

公开(公告)号：US09130628B1

公开(公告)日：2015-09-08

申请号：US14582212

申请日：2014-12-24

申请人： Akshat Mittal ,  Arvind Kaushik ,  Peter Z. Rashev ,  Amrit P. Singh

发明人： Akshat Mittal ,  Arvind Kaushik ,  Peter Z. Rashev ,  Amrit P. Singh

IPC分类号： H04B1/62 ,  H04B1/04 ,  H04L27/36 ,  H03F1/32

CPC分类号： H04B1/0475 ,  H03F1/3241 ,  H03F1/3247 ,  H03F3/24 ,  H03F3/68 ,  H03F2201/3233 ,  H04B2001/0425 ,  H04L27/368

摘要： A digital pre-distorter (DPD) for an RF transceiver system having multiple antennas includes a DPD controller, first and second address generators, stream select and antenna select muxes, first and second lookup tables (LUTs), first and second dynamic routing logic units, multipliers, an adder, and an accumulator. The DPD controller generates antenna select, stream select and stream routing signals indicative of selection of antennas, the first and second LUTs, and input signals. The DPD controller configures the DPD to share the multipliers and the first and second LUTs between multiple antennas by providing the antenna select signal to the antenna select mux, the stream select signal to the stream select mux, and the stream routing signals to the first and second dynamic routing logic units.

摘要翻译： 用于具有多个天线的RF收发器系统的数字预失真器（DPD）包括DPD控制器，第一和第二地址发生器，流选择和天线选择多路复用器，第一和第二查找表（LUT），第一和第二动态路由逻辑单元 ，乘法器，加法器和累加器。 DPD控制器产生指示天线选择，第一和第二LUT以及输入信号的天线选择，流选择和流选路信号。 DPD控制器通过向天线选择多路复用器提供天线选择信号，将流选择信号提供给流选择多路复用器，并将流路由信号配置为在多个天线之间共享乘法器和第一和第二LUT， 第二动态路由逻辑单元。

公开(公告)号：US20160179715A1

公开(公告)日：2016-06-23

申请号：US14580158

申请日：2014-12-22

申请人： Arvind Kaushik ,  Peter Z. Rashev ,  Amrit P. Singh ,  Akshat Mittal

发明人： Arvind Kaushik ,  Peter Z. Rashev ,  Amrit P. Singh ,  Akshat Mittal

IPC分类号： G06F13/24 ,  G06F13/28

CPC分类号： G06F13/24 ,  G06F13/28 ,  H03F1/3247 ,  Y02D10/14

摘要： A system for storing pre-distorted output samples in a memory includes a sample counter, a programming interface module, and a comparator. The sample counter counts the pre-distorted output samples, generates a dynamic count value, receives a capture counter status signal, and generates a first count value. The programming interface module receives and outputs the first count value, an offset value, and a capture control signal, and generates a first interrupt signal. The comparator receives the first count value, the offset value, the dynamic count value, and the capture control signal, generates a final value, compares the final value with the dynamic count value, and generates a trigger signal when the final value equals the dynamic count value based on the capture control signal. The trigger signal initiates the storing of the pre-distorted output samples in the memory.

摘要翻译： 用于将预失真输出样本存储在存储器中的系统包括采样计数器，编程接口模块和比较器。 样本计数器对预失真的输出样本进行计数，生成动态计数值，接收捕获计数器状态信号，并生成第一个计数值。 编程接口模块接收并输出第一计数值，偏移值和捕获控制信号，并产生第一中断信号。 比较器接收第一计数值，偏移值，动态计数值和捕获控制信号，生成最终值，将最终值与动态计数值进行比较，并在最终值等于动态计数值时产生触发信号 基于捕获控制信号的计数值。 触发信号启动将预失真输出样本存储在存储器中。

公开(公告)号：US09231530B1

公开(公告)日：2016-01-05

申请号：US14591928

申请日：2015-01-08

申请人： Arvind Kaushik ,  Peter Z. Rashev ,  Amrit P. Singh ,  Akshat Mittal

发明人： Arvind Kaushik ,  Peter Z. Rashev ,  Amrit P. Singh ,  Akshat Mittal

IPC分类号： H04K1/02 ,  H04L25/03 ,  H04L25/49 ,  H03F1/32 ,  H04B1/04

CPC分类号： H04B1/0475 ,  H03F1/3241 ,  H03F1/3247 ,  H03F3/24 ,  H03F2200/321 ,  H04B17/13 ,  H04B2001/0425 ,  H04W52/362

摘要： A system for calibrating a power amplifier (PA) includes a memory, a processor, a digital pre-distorter (DPD), and a data converter. The DPD includes a programming interface module, a pattern generator, a multiplier, and a pre-distorter module. The multiplier multiplies reference baseband stream data from the memory with pattern coefficient data generated by the pattern generator to generate shaped reference baseband stream data. The pre-distorter module generates pre-distorted shaped reference baseband stream data. The PA receives a low-power reference radio frequency (RF) signal corresponding to the pre-distorted shaped reference baseband stream data and generates a high-power reference RF signal. The processor receives and compares the pre-distorted shaped reference baseband stream data with amplified shaped reference baseband stream data corresponding to the high-power reference RF signal, and adjusts pre-distortion parameters in the pre-distorter module based on the comparison such that the PA generates a linear high-power RF signal.

摘要翻译： 用于校准功率放大器（PA）的系统包括存储器，处理器，数字预失真器（DPD）和数据转换器。 DPD包括编程接口模块，模式发生器，乘法器和预失真器模块。 乘法器将来自存储器的参考基带流数据与由模式发生器产生的模式系数数据相乘以产生形状参考基带流数据。 预失真器模块生成预失真的参考基带流数据。 PA接收与预失真的参考基带流数据相对应的低功率参考射频（RF）信号，并产生高功率参考RF信号。 处理器接收并比较预失真的参考基带流数据与对应于大功率参考RF信号的放大的成形参考基带流数据，并且基于比较调整预失真器模块中的预失真参数，使得 PA产生线性高功率RF信号。

公开(公告)号：US09088472B1

公开(公告)日：2015-07-21

申请号：US14591930

申请日：2015-01-08

申请人： Nikhil Jain ,  Arvind Kaushik ,  Peter Z. Rashev ,  Amrit P. Singh

发明人： Nikhil Jain ,  Arvind Kaushik ,  Peter Z. Rashev ,  Amrit P. Singh

IPC分类号： H04L25/49 ,  H04L27/36 ,  H03F1/32

CPC分类号： H04L27/364 ,  H03F1/3247 ,  H03F3/24 ,  H04L27/368 ,  H04L27/3863

摘要： A system for reducing in-phase and quadrature-phase (I/Q) impairments includes first, second, third, and fourth programmable registers for storing respective first, second, third, and fourth values, first and second finite impulse response (FIR) filters having respective first and second sets of filter taps, and first and second adders. The first FIR filter receives an I input signal and generates first and second intermediate output signals based on the first and second values for I and Q channels, respectively. The second FIR filter receives a Q input signal and generates third and fourth intermediate output signals based on the third and fourth values for the I and Q channels, respectively. The first and second adders receive the first and second, and the third and fourth intermediate output signals, respectively, and generate compensated I and Q output signals for the I and Q channels.

摘要翻译： 用于减小同相和正交相位（I / Q）损伤的系统包括用于存储相应的第一，第二，第三和第四值的第一，第二，第三和第四可编程寄存器，第一和第二有限脉冲响应（FIR） 滤波器具有相应的第一和第二组滤波器抽头，以及第一和第二加法器。 第一FIR滤波器接收I输入信号，并且基于I和Q通道的第一和第二值分别产生第一和第二中间输出信号。 第二FIR滤波器接收Q输入信号，并且分别基于I和Q通道的第三和第四值产生第三和第四中间输出信号。 第一和第二加法器分别接收第一和第二以及第三和第四中间输出信号，并产生用于I和Q通道的补偿的I和Q输出信号。

公开(公告)号：US20160182015A1

公开(公告)日：2016-06-23

申请号：US14576149

申请日：2014-12-18

申请人： Vinay Gupta ,  Arvind Kaushik ,  Akshat Mittal ,  Amrit P. Singh

发明人： Vinay Gupta ,  Arvind Kaushik ,  Akshat Mittal ,  Amrit P. Singh

IPC分类号： H03H17/02

CPC分类号： H03H17/0685 ,  H03H17/0275

摘要： A fractional and integer ratio polyphase interpolation filter changes the sample rate of an input digital signal by a ratio defined by an interpolation rate, M, and a decimation rate, N. The clock rate required to evaluate the output signal is M/N.

摘要翻译： 分数和整数比多相插值滤波器通过由内插速率M和抽取率N定义的比例来改变输入数字信号的采样率。评估输出信号所需的时钟速率为M / N。

公开(公告)号：US08432960B2

公开(公告)日：2013-04-30

申请号：US12727189

申请日：2010-03-18

申请人： Girraj K. Agrawal ,  Asif Iqbal ,  Akshat Mittal ,  Ankit Pal ,  Amrit P. Singh

发明人： Girraj K. Agrawal ,  Asif Iqbal ,  Akshat Mittal ,  Ankit Pal ,  Amrit P. Singh

IPC分类号： H03H7/30

CPC分类号： H04L25/03019 ,  H04L25/03885

摘要： A channel equalizer that compensates for signal distortion of a signal in a communication channel includes an equalization filter, which gain-equalizes a received signal received through the communication channel, and an equalization control circuit, which generates a gain control signal for controlling the gain of the equalization filter. The equalization control circuit specifies a phase switch in data obtained by the equalization filter as an isolated bit and generates the gain control signal based on a width of the isolated bit.

摘要翻译： 补偿通信信道中的信号的信号失真的信道均衡器包括均衡滤波器，其对通过通信信道接收的接收信号进行增益均衡，以及均衡控制电路，其产生用于控制增益的增益控制信号 均衡滤波器。 均衡控制电路指定由均衡滤波器获得的数据中的相位切换作为隔离位，并且基于隔离位的宽度生成增益控制信号。

公开(公告)号：US20110228839A1

公开(公告)日：2011-09-22

申请号：US12727189

申请日：2010-03-18

申请人： Girraj K. Agrawal ,  Asif Iqbal ,  Akshat Mittal ,  Ankit Pal ,  Amrit P. Singh

发明人： Girraj K. Agrawal ,  Asif Iqbal ,  Akshat Mittal ,  Ankit Pal ,  Amrit P. Singh

IPC分类号： H04L27/01

CPC分类号： H04L25/03019 ,  H04L25/03885

摘要： A channel equalizer that compensates for signal distortion of a signal in a communication channel includes an equalization filter, which gain-equalizes a received signal received through the communication channel, and an equalization control circuit, which generates a gain control signal for controlling the gain of the equalization filter. The equalization control circuit specifies a phase switch in data obtained by the equalization filter as an isolated bit and generates the gain control signal based on a width of the isolated bit.

摘要翻译： 补偿通信信道中的信号的信号失真的信道均衡器包括均衡滤波器，其对通过通信信道接收的接收信号进行增益均衡，以及均衡控制电路，其产生用于控制增益的增益控制信号 均衡滤波器。 均衡控制电路指定由均衡滤波器获得的数据中的相位切换作为隔离位，并且基于隔离位的宽度生成增益控制信号。

公开(公告)号：US20110090973A1

公开(公告)日：2011-04-21

申请号：US12581899

申请日：2009-10-20

申请人： Mridul Manohar Mishra ,  Amrit P. Singh ,  Anshoo Tandon

发明人： Mridul Manohar Mishra ,  Amrit P. Singh ,  Anshoo Tandon

IPC分类号： H04J11/00 ,  H04L27/28 ,  H04L27/06

CPC分类号： H04L27/2662 ,  H04L5/0025 ,  H04L27/2675 ,  H04L27/2678 ,  H04L27/2682 ,  H04L27/2688

摘要： A method for determining a symbol boundary of a data packet of a received signal, where the data packet includes a first training field, a guard interval, and a second training field. The received signal is sampled to obtain multiple samples. A first symbol boundary estimate is determined using one or more block auto-correlation values. Thereafter, a second symbol boundary estimate is determined based on the first symbol boundary estimate and using one or more cross-correlation values. The second symbol boundary estimate then is shifted using moving average auto-correlation values for the samples in the vicinity of the second symbol boundary estimate to obtain an accurate symbol boundary estimate.

摘要翻译： 一种用于确定接收信号的数据分组的符号边界的方法，其中所述数据分组包括第一训练场，保护间隔和第二训练场。 对接收到的信号进行采样以获得多个样本。 使用一个或多个块自相关值来确定第一符号边界估计。 此后，基于第一符号边界估计并使用一个或多个互相关值来确定第二符号边界估计。 然后，使用第二符号边界估计附近的样本的移动平均自相关值来移位第二符号边界估计，以获得准确的符号边界估计。

公开(公告)号：US07231586B2

公开(公告)日：2007-06-12

申请号：US10896268

申请日：2004-07-21

申请人： Mohit K. Prasad ,  Gaurav Davra ,  Arnab K. Mitra ,  Amrit P. Singh ,  Nitin Vig

发明人： Mohit K. Prasad ,  Gaurav Davra ,  Arnab K. Mitra ,  Amrit P. Singh ,  Nitin Vig

IPC分类号： H03M13/03

CPC分类号： H03M13/6502 ,  H03M13/3961 ,  H03M13/41 ,  H03M13/4107 ,  H03M13/4169 ,  H03M13/6505

摘要： A method and system for decoding a data symbol sequence that has been previously encoded using one or more unique code word polynomials in which at least one unique code word polynomial is used more than once. A set of 2d-1 unique branch metrics is computed, using the unique code word polynomials, where d is the number of unique code word polynomials. The computed set of 2d-1 unique branch metrics is stored in a memory. Path metrics are then calculated, based on the stored set of 2d-1 unique branch metrics. A decoded data symbol sequence is generated based on the computed path metrics.

摘要翻译： 一种用于对先前使用一个或多个唯一码字多项式进行编码的数据符号序列的方法和系统，其中至少一个唯一码字多项式被多次使用。 使用唯一的码字多项式来计算一组2 D-1 唯一分支度量，其中d是唯一码字多项式的数量。 所计算的2个独立分支度量的集合被存储在存储器中。 然后，基于存储的2个独立分支度量的集合来计算路径度量。 基于所计算的路径度量来生成解码数据符号序列。