摘要:
An injection-locked oscillator circuit includes a master oscillator, a slave oscillator, and an injection lock control circuit. The slave oscillator is decoupled from the master oscillator (for example, due to an unlock condition). When the slave is free running, its oscillating frequency is adjusted (for example, as a function of a supply voltage). After an amount of time, the slave is to be relocked to the master (for example, due the unlock condition no longer being present). The slave oscillating frequency is made to be slightly lower than the master oscillating frequency. The slave is then only recoupled to the master upon detection of an opposite-phase condition between the master oscillator output signal and the slave oscillator output signal. By only recoupling the slave to the master during opposite-phase conditions, frequency overshoots in the slave oscillating frequency are avoided that may otherwise occur were the recoupling done during in-phase conditions.
摘要:
A supply-regulated VCO exhibits reduced or no supply sensitivity peaking. The VCO includes an oscillator whose supply current is regulated to control the oscillating frequency of the oscillator. A VCO input signal controls the supply current so that there is a relationship between the input signal and the oscillator output frequency. Power supply noise that might otherwise affect oscillator operation is shunted from a supply current input lead of the oscillator to ground by a bypass capacitor. In one example, an auxiliary circuit supplies an auxiliary supply current to the oscillator, thereby reducing the amount of supply current a supply regulation control loop circuit must supply. In another example, a supply regulation control loop circuit supplies a control current to a main oscillator, but the bypass capacitor is not coupled to this oscillator but rather is coupled to a slave oscillator that is injection locked to the main oscillator.
摘要:
An injection-locked oscillator circuit includes a master oscillator, a slave oscillator, and an injection lock control circuit. The slave oscillator is decoupled from the master oscillator (for example, due to an unlock condition). When the slave is free running, its oscillating frequency is adjusted (for example, as a function of a supply voltage). After an amount of time, the slave is to be relocked to the master (for example, due the unlock condition no longer being present). The slave oscillating frequency is made to be slightly lower than the master oscillating frequency. The slave is then only recoupled to the master upon detection of an opposite-phase condition between the master oscillator output signal and the slave oscillator output signal. By only recoupling the slave to the master during opposite-phase conditions, frequency overshoots in the slave oscillating frequency are avoided that may otherwise occur were the recoupling done during in-phase conditions.
摘要:
A charge pump includes an UP current mirror and a DN current mirror. The UP current mirror is controlled by an input UP signal and supplies charge onto an output node. The DN current mirror is controlled by an input DN signal and draws charge from the output node. The input UP and DN signals may be received from a phase detector in a Phase-Locked Loop (PLL). To prevent disturbances on bias nodes of the UP and DN current mirrors that otherwise might occur, replica circuits of portions of the UP and DN current mirrors are provided. Each replica circuit is coupled to a bias node of a corresponding current mirror, but is controlled by an input signal of opposite polarity to the input signal that controls the current mirror so that the replica circuit creates disturbances that tend to counteract disturbances created by switching of the current mirror.
摘要:
A charge pump includes an UP current mirror and a DN current mirror. The UP current mirror is controlled by an input UP signal and supplies charge onto an output node. The DN current mirror is controlled by an input DN signal and draws charge from the output node. The input UP and DN signals may be received from a phase detector in a Phase-Locked Loop (PLL). To prevent disturbances on bias nodes of the UP and DN current mirrors that otherwise might occur, replica circuits of portions of the UP and DN current mirrors are provided. Each replica circuit is coupled to a bias node of a corresponding current mirror, but is controlled by an input signal of opposite polarity to the input signal that controls the current mirror so that the replica circuit creates disturbances that tend to counteract disturbances created by switching of the current mirror.
摘要:
Temperature-independent delay elements and oscillators are disclosed. In one design, an apparatus includes at least one delay element, a bias circuit, and a current source. The delay element(s) receive a charging current from the current source and provide a delay that is dependent on the charging current. Each delay element may be a current-starved delay element. The delay element(s) may be coupled in series to implement a delay line or in a loop to implement an oscillator. The bias circuit controls generation of the charging current based on a function of at least one parameter (e.g., a switching threshold voltage) of the at least one delay element in order to reduce variations in delay with temperature. The current source provides the charging current for the delay element(s) and is controlled by the bias circuit.
摘要:
Closed-loop techniques for adjusting the duty cycle of a cyclical signal, e.g., a clock signal, to approach a target value. In an exemplary embodiment, a charge pump is coupled to a charge and sample module, which drives a de-skew circuit in a negative feedback loop. The charge and sample module couples the charge pump to the integration capacitor during two of four successive phases, and also couples the integration capacitor to sampling capacitors during the other two of the four successive phases. The voltages across the sampling capacitors may be used to control the de-skew circuit, which adjusts the duty cycle of a cyclical signal to be adjusted.
摘要:
Temperature-independent delay elements and oscillators are disclosed. In one design, an apparatus includes at least one delay element, a bias circuit, and a current source. The delay element(s) receive a charging current from the current source and provide a delay that is dependent on the charging current. Each delay element may be a current-starved delay element. The delay element(s) may be coupled in series to implement a delay line or in a loop to implement an oscillator. The bias circuit controls generation of the charging current based on a function of at least one parameter (e.g., a switching threshold voltage) of the at least one delay element in order to reduce variations in delay with temperature. The current source provides the charging current for the delay element(s) and is controlled by the bias circuit.
摘要:
A supply-regulated VCO exhibits reduced or no supply sensitivity peaking. The VCO includes an oscillator whose supply current is regulated to control the oscillating frequency of the oscillator. A VCO input signal controls the supply current so that there is a relationship between the input signal and the oscillator output frequency. Power supply noise that might otherwise affect oscillator operation is shunted from a supply current input lead of the oscillator to ground by a bypass capacitor. In one example, an auxiliary circuit supplies an auxiliary supply current to the oscillator, thereby reducing the amount of supply current a supply regulation control loop circuit must supply. In another example, a supply regulation control loop circuit supplies a control current to a main oscillator, but the bypass capacitor is not coupled to this oscillator but rather is coupled to a slave oscillator that is injection locked to the main oscillator.
摘要:
Closed-loop techniques for adjusting the duty cycle of a cyclical signal, e.g., a clock signal, to approach a target value. In an exemplary embodiment, a charge pump is coupled to a charge and sample module, which drives a de-skew circuit in a negative feedback loop. The charge and sample module couples the charge pump to the integration capacitor during two of four successive phases, and also couples the integration capacitor to sampling capacitors during the other two of the four successive phases. The voltages across the sampling capacitors may be used to control the de-skew circuit, which adjusts the duty cycle of a cyclical signal to be adjusted.