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公开(公告)号:US20230341734A1
公开(公告)日:2023-10-26
申请号:US17908426
申请日:2021-09-02
Inventor: Jie YANG , Yan WANG , Xinya ZHANG , Zhe LI , Li TIAN
IPC: G02F1/1362
CPC classification number: G02F1/136295 , G02F1/136209 , G02F1/136222
Abstract: A display module includes a display panel and a dimming panel stacked on the display panel. The display panel has a plurality of pixel The dimming panel a plurality of dimming regions, and in a direction perpendicular to the display panel, a dimming region covers at least one pixel region. The dimming panel includes a plurality of dimming electrodes and a plurality of signal lines. Each dimming electrode is located in dimming region in the plurality of dimming regions, and any two adjacent dimming electrodes have a gap therebetween. Each dimming electrode is directly electrically connected to at least one signal line. The at least one signal line is configured to transmit a control voltage signal to the dimming electrode electrically connected to the at least one signal line for controlling a light transmittance of the dimming region where the dimming electrode is located.
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公开(公告)号:US20230258989A1
公开(公告)日:2023-08-17
申请号:US17622205
申请日:2020-12-04
Inventor: Yanping LIAO , Maoxiu ZHOU , Yingmeng MIAO , Haipeng YANG , Li TIAN , Zhihua SUN
IPC: G02F1/1362 , G02F1/1343 , G02F1/1368 , H01L27/12
CPC classification number: G02F1/136286 , G02F1/134345 , G02F1/1368 , H01L27/124 , G02F2201/52 , G02F2201/123 , G02F2201/121
Abstract: An array substrate and a display panel are described. The array substrate may include a first base; a plurality of pixel units arrayed on the first base in a row direction and a column direction; each of the pixel units comprising at least two sub-pixels arranged in the row direction; a plurality of first scanning lines sequentially arranged on the first base in the column direction, at least one first scanning line being arranged at a side of each row of pixel units in the column direction, the first scanning lines being connected with the sub-pixels; and a plurality of second scanning lines sequentially arranged on the first base in the row direction, at least one second scanning line being arranged at a side of each column of pixel units in the row direction.
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公开(公告)号:US20230141490A1
公开(公告)日:2023-05-11
申请号:US18093063
申请日:2023-01-04
Inventor: Yuntian ZHANG , Zhou RUI , Peng JIANG , Haipeng YANG , Ke DAI , Chunxu ZHANG , Zhonghou WU , Li TIAN
IPC: H01L29/423 , G02F1/1343 , G02F1/1362 , G02F1/1368 , H01L27/12 , H01L29/417
CPC classification number: H01L29/42384 , G02F1/134309 , G02F1/136286 , G02F1/1368 , H01L27/124 , H01L29/41733
Abstract: A thin film transistor, an array substrate and a display device are provided. The thin film transistor is on a base substrate and includes a gate electrode, a first electrode, and a second electrode on the base substrate. The gate electrode includes a first body portion and a first extension portion extending along the first direction, electrically connected with the first body portion, and spaced apart from the first body portion by a first spacing. The first electrode includes a first overlapping end, an orthographic projection of the first overlapping end on the base substrate at least partially overlaps with an orthographic projection of the first body portion on the base substrate; a first compensation end at a side of the first overlapping end away from the first body portion, an orthographic projection of the first compensation end on the base substrate at least partially overlaps with an orthographic projection of the first extension portion on the base substrate; and a first intermediate portion connecting the first overlapping end and the first compensation end, an orthographic projection of the first intermediate portion on the base substrate is within an orthographic projection of the first spacing on the base substrate.
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公开(公告)号:US20220397798A1
公开(公告)日:2022-12-15
申请号:US17789154
申请日:2021-06-11
Inventor: Pengtao LI , Rui HAN , Xiaoxia WANG , Jie YU , Qing MA , Daekeun YOON , Weining CHI , Li TIAN
IPC: G02F1/1335 , G02F1/1362 , G09G3/34 , G09G3/36
Abstract: A display device includes: a plurality of backlight modules, where each backlight module includes a plurality of light sources capable of emitting light in at least three different colors; a color-filter-less liquid crystal display module including a plurality of pixel units arranged in an array form and a plurality of scanning lines coupled to the pixel units; where the plurality of backlight modules are arranged in parallel with the liquid crystal display module; where an orthogonal projection of each backlight module onto a plane where the liquid crystal display module is located corresponds to at least two rows of pixel units, where the pixel units in one row are along an length extension direction of each scanning line; and a driving circuit coupled to each backlight module and configured to apply a backlight driving signal to each backlight module.
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公开(公告)号:US20220283457A1
公开(公告)日:2022-09-08
申请号:US17631334
申请日:2021-03-12
IPC: G02F1/1368 , G02F1/1362
Abstract: The present disclosure provides a display substrate and a display device, and belongs to the field of display technology. The display substrate includes: a base substrate having a peripheral region, and thin film transistors disposed in the peripheral region of the base substrate. A gate electrode of the thin film transistor includes a plurality of sub-electrodes arranged at intervals.
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公开(公告)号:US20220262823A1
公开(公告)日:2022-08-18
申请号:US17597882
申请日:2021-04-20
Inventor: Chunguang TIAN , Li TIAN , Cuicui ZHENG
IPC: H01L27/12
Abstract: A display panel includes an opposing substrate and a display substrate. At least one side of the display substrate has a pad area in which gold fingers are arranged. The orthographic projection of the opposing substrate on the display substrate covers the pad area. In a non-display area of the display panel, the opposing substrate and the display substrate are bonded by means of frame sealant. The pad area is located on the outer side of the frame sealant. Side surfaces of the gold fingers are exposed from the side surface of the display substrate. A conductive layer is formed on the side surfaces of the gold fingers. The display panel further includes a flexible buffer layer which is filled between the opposing substrate and the display substrate and covers the gold fingers. The flexible buffer layer is located on the outer side of the frame sealant.
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公开(公告)号:US20220037492A1
公开(公告)日:2022-02-03
申请号:US17280491
申请日:2020-10-13
Inventor: Yuntian ZHANG , Zhou RUI , Peng JIANG , Haipeng YANG , Ke DAI , Chunxu ZHANG , Zhonghou WU , Li TIAN
IPC: H01L29/423 , G02F1/1343 , G02F1/1368 , G02F1/1362 , H01L29/417 , H01L27/12
Abstract: A thin film transistor, an array substrate and a display device. The thin film transistor includes a gate electrode, a first electrode, and a second electrode on the base substrate. The gate electrode includes a first body portion and a first extension portion extending along the first direction, electrically connected with the first body portion, and spaced apart from the first body portion by a first spacing. The first electrode includes a first overlapping end, an orthographic projection of the first overlapping end on the base substrate at least partially overlaps with an orthographic projection of the first body portion on the base substrate; a first compensation end at a side of the first overlapping end away from the first body portion; and a first intermediate portion connecting the first overlapping end and the first compensation end.
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公开(公告)号:US20220036799A1
公开(公告)日:2022-02-03
申请号:US17277352
申请日:2020-07-14
Inventor: Yuntian ZHANG , Peng JIANG , Haipeng YANG , Ke DAI , Chunxu ZHANG , Zhonghou WU , Li TIAN
IPC: G09G3/20
Abstract: The present disclosure provides a gate driving circuit, a control method thereof, and a display device. The gate driving circuit includes: an input sub-circuit (110) configured to convert the potential of a first node (N1) from a first level to a second level; an output sub-circuit (120) configured to output a gate driving signal (SOUT); a first reset sub-circuit (130) configured to reset the potential of the first node (N1); at least one noise reduction sub-circuit (140) configured to maintain the potentials of the first node (N1) and an output end of the output sub-circuit (120) at the first level in the case that the potential of the first ode (N1) is reset; and a function maintaining sub-circuit (150) configured to control the noise reduction sub-circuit (140) to operate so that the noise reduction sub-circuit (140) interrupts the first node (N1) and a first voltage terminal.
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公开(公告)号:US20200064685A1
公开(公告)日:2020-02-27
申请号:US16413084
申请日:2019-05-15
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Zhidong WANG , Lijia ZHOU , Junrui ZHANG , Rongjian YAN , Quanguo ZHOU , Li TIAN , Ronghua LAN , Xuehui ZHU
IPC: G02F1/1335 , G02F1/1343 , G02F1/1337
Abstract: Embodiments of the present disclosure relate to a movable electrode structure and a liquid crystal lens. The movable electrode structure includes: a substrate; a support on the substrate; a first beam having elasticity and attached to the support; an electrode attached to the first beam; and an opposing member located on the substrate and at least partially facing the first beam.
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公开(公告)号:US20230030213A1
公开(公告)日:2023-02-02
申请号:US17764448
申请日:2021-03-09
Inventor: Zepeng SUN , Yong ZHANG , Xianglei QIN , Jian WANG , Yanchen LI , Jian LIN , Limin ZHANG , Zhichao YANG , Liangzhen TANG , Zhilong DUAN , Yashuai AN , Lingfang NIE , Honggui JIN , Li TIAN
IPC: G02F1/1333 , G02F1/1362 , G02F1/133 , G02F1/1368 , G02F1/1345 , H01L27/12 , G09G3/36
Abstract: Provided is a display substrate. The display substrate includes: a base substrate including a display region and a non-display region surrounding the display region; a gate drive circuit disposed in the non-display region; a plurality of first signal lines disposed in the peripheral region and connected to the gate drive circuit; and a plurality of second signal lines disposed in the non-display region and connected to the gate drive circuit; wherein each of the first signal line and the second signal line is configured to supply a signal to the gate drive circuit, and a frequency of the signal supplied by the first signal line is lower than a frequency of the signal supplied by the second signal line.
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