Multi-layered metal line having an improved diffusion barrier of a semiconductor device and method for forming the same
    5.
    发明授权
    Multi-layered metal line having an improved diffusion barrier of a semiconductor device and method for forming the same 失效
    具有改善的半导体器件的扩散势垒的多层金属线及其形成方法

    公开(公告)号:US07902065B2

    公开(公告)日:2011-03-08

    申请号:US11939798

    申请日:2007-11-14

    IPC分类号: H01L21/00

    摘要: A multi-layered metal line of a semiconductor device and a process of forming the same are described. The multi-layered metal line includes a lower metal line formed on a semiconductor substrate. An insulation layer is subsequently formed on the semiconductor substrate including the lower metal line and has an upper metal line forming region that exposes a portion of the lower metal line. A diffusion barrier formed on a surface of the upper metal line forming region of the insulation layer. The diffusion barrier includes a W—B—N ternary layer. An upper metal line is finally formed on the diffusion barrier to fill the upper metal line forming region of the insulation layer.

    摘要翻译: 描述半导体器件的多层金属线及其形成方法。 多层金属线包括形成在半导体衬底上的下金属线。 随后在包括下金属线的半导体衬底上形成绝缘层,并且具有暴露下部金属线的一部分的上部金属线形成区域。 形成在绝缘层的上部金属线形成区域的表面上的扩散阻挡层。 扩散阻挡层包括W-B-N三元层。 在扩散阻挡层上最终形成上金属线以填充绝缘层的上金属线形成区域。

    Metal line of semiconductor device without production of high resistance compound due to metal diffusion and method for forming the same
    6.
    发明授权
    Metal line of semiconductor device without production of high resistance compound due to metal diffusion and method for forming the same 失效
    由于金属扩散而不生产高电阻化合物的半导体器件的金属线及其形成方法

    公开(公告)号:US08159069B2

    公开(公告)日:2012-04-17

    申请号:US12940521

    申请日:2010-11-05

    IPC分类号: H01L23/48

    摘要: A metal line includes a lower metal line formed on a semiconductor substrate. An insulation layer is formed on the semiconductor substrate having the lower metal line, and a metal line forming region exposing at least a portion of the lower metal line is defined in the insulation layer. A diffusion barrier is formed on a surface of the metal line forming region of the insulation layer and includes a WNx layer, a W—N—B ternary layer, and a Ti—N—B ternary layer. A wetting layer is formed on the diffusion barrier and is made of one of a Ti layer or a TiN layer. An upper metal line is formed on the wetting layer to fill the metal line forming region of the insulation layer.

    摘要翻译: 金属线包括形成在半导体衬底上的下金属线。 在具有下金属线的半导体衬底上形成绝缘层,并且在绝缘层中限定暴露下金属线的至少一部分的金属线形成区域。 在绝缘层的金属线形成区域的表面上形成扩散阻挡层,其包括WNx层,W-N-B三元层和Ti-N-B三元层。 在扩散阻挡层上形成润湿层,由Ti层或TiN层之一构成。 在润湿层上形成上金属线以填充绝缘层的金属线形成区域。

    Metal line of semiconductor device without production of high resistance compound due to metal diffusion and method for forming the same
    7.
    发明授权
    Metal line of semiconductor device without production of high resistance compound due to metal diffusion and method for forming the same 有权
    由于金属扩散而不生产高电阻化合物的半导体器件的金属线及其形成方法

    公开(公告)号:US07855456B2

    公开(公告)日:2010-12-21

    申请号:US12328988

    申请日:2008-12-05

    IPC分类号: H01L23/48

    摘要: A metal line includes a lower metal line formed on a semiconductor substrate. An insulation layer is formed on the semiconductor substrate having the lower metal line, and a metal line forming region exposing at least a portion of the lower metal line is defined in the insulation layer. A diffusion barrier is formed on a surface of the metal line forming region of the insulation layer and includes a WNx layer, a W—N—B ternary layer, and a Ti—N—B ternary layer. A wetting layer is formed on the diffusion barrier and is made of one of a Ti layer or a TiN layer. An upper metal line is formed on the wetting layer to fill the metal line forming region of the insulation layer.

    摘要翻译: 金属线包括形成在半导体衬底上的下金属线。 在具有下金属线的半导体衬底上形成绝缘层,并且在绝缘层中限定暴露下金属线的至少一部分的金属线形成区域。 在绝缘层的金属线形成区域的表面上形成扩散阻挡层,其包括WNx层,W-N-B三元层和Ti-N-B三元层。 在扩散阻挡层上形成润湿层,由Ti层或TiN层之一构成。 在润湿层上形成上金属线以填充绝缘层的金属线形成区域。

    Method for manufacturing semiconductor device preventing loss of junction region
    9.
    发明授权
    Method for manufacturing semiconductor device preventing loss of junction region 有权
    制造防止结区域损失的半导体器件的方法

    公开(公告)号:US07820546B2

    公开(公告)日:2010-10-26

    申请号:US12347420

    申请日:2008-12-31

    IPC分类号: H01L21/4763

    CPC分类号: H01L21/28518

    摘要: A method for manufacturing a semiconductor device includes forming an insulation layer having a contact hole on a semiconductor substrate. A metal silicide layer is deposited on a surface of the contact hole and the insulation layer to have a concentration gradient that changes from a silicon-rich composition to a metal-rich composition, with the lower portion of the metal silicide layer having the silicon-rich composition and the upper portion of the metal silicide layer having the metal-rich composition. The metal silicide layer is then annealed so that the compositions of metal and silicon in the metal silicide layer become uniform.

    摘要翻译: 一种制造半导体器件的方法包括在半导体衬底上形成具有接触孔的绝缘层。 金属硅化物层沉积在接触孔和绝缘层的表面上,具有从富含硅的组合物变为富含金属的组合物的浓度梯度,金属硅化物层的下部具有硅 - 富金属组合物和具有富金属组合物的金属硅化物层的上部。 然后对金属硅化物层进行退火,使得金属硅化物层中的金属和硅的组成变得均匀。