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    SELF ALIGNED TRIPLE PATTERNING
    2.
    发明申请
    SELF ALIGNED TRIPLE PATTERNING 审中-公开
    自对准三重图案

    公开(公告)号：US20120085733A1

    公开(公告)日：2012-04-12

    申请号：US13042060

    申请日：2011-03-07

    申请人： Bencherki Mebarki ,  Hao Chen ,  Kedar Sapre ,  Anchuan Wang ,  Tushar Mandrekar ,  Jingmei Liang ,  Yongmei Chen ,  Christopher S. Ngai ,  Mehul Naik

    发明人： Bencherki Mebarki ,  Hao Chen ,  Kedar Sapre ,  Anchuan Wang ,  Tushar Mandrekar ,  Jingmei Liang ,  Yongmei Chen ,  Christopher S. Ngai ,  Mehul Naik

    IPC分类号： C23F1/02

    CPC分类号： H01L21/0337 ,  H01L21/0338

    摘要： Embodiments of the present invention pertain to methods of forming features on a substrate using a self-aligned triple patterning (SATP) process. A stack of layers is patterned near the optical resolution of a photolithography system using a high-resolution photomask. The heterogeneous stacks are selectively etched to undercut a hard mask layer beneath overlying cores. A dielectric layer, which is flowable during formation, is deposited and fills the undercut regions as well as the regions between the heterogeneous stacks. The dielectric layer is anisotropically etched and a conformal spacer is deposited on and between the cores. The spacer is anisotropically etched to leave two spacers between each core. The cores are stripped and the spacers are used together with the remaining hard mask features to pattern the substrate at triple the density of the original pattern.

    摘要翻译： 本发明的实施例涉及使用自对准三重图案化（SATP）工艺在衬底上形成特征的方法。 使用高分辨率光掩模，在光刻系统的光学分辨率附近对一叠层进行图案化。 选择性地蚀刻异质堆叠以在覆盖的芯之下切割硬掩模层。 在形成期间可流动的介电层被沉积并填充底切区域以及异质堆叠之间的区域。 介电层被各向异性地蚀刻，并且保形间隔物沉积在芯之间和之间。 间隔物被各向异性蚀刻以在每个芯之间留下两个间隔物。 芯被剥离，并且间隔物与剩余的硬掩模特征一起使用以将原始图案的密度的三倍图案化。

    SELF-ALIGNED MULTI-PATTERNING FOR ADVANCED CRITICAL DIMENSION CONTACTS
    3.
    发明申请
    SELF-ALIGNED MULTI-PATTERNING FOR ADVANCED CRITICAL DIMENSION CONTACTS 有权
    用于高级关键尺寸联系人的自对准多模式

    公开(公告)号：US20100136792A1

    公开(公告)日：2010-06-03

    申请号：US12603371

    申请日：2009-10-21

    申请人： Bencherki Mebarki ,  Li Yan Miao ,  Christopher Dennis Bencher ,  Jen Shu

    发明人： Bencherki Mebarki ,  Li Yan Miao ,  Christopher Dennis Bencher ,  Jen Shu

    IPC分类号： H01L21/30 ,  G03F7/20

    CPC分类号： H01L21/0337

    摘要： Embodiments of the present invention pertain to methods of forming patterned features on a substrate having a reduced pitch in two dimensions as compared to what is possible using standard photolithography processing techniques using a single high-resolution photomask. A spacer layer is formed over a two-dimensional square grid of cores with a thickness chosen to leave a dimple at the center of four cores on the corners of a square. The spacer layer is etched back to reveal the substrate at the centers of the square. Removing the core material results in double the pattern density of the lithographically defined grid of cores. The regions of exposed substrate may be filled again with core material and the process repeated to quadruple the pattern density.

    摘要翻译： 本发明的实施例涉及在使用单个高分辨率光掩模的标准光刻处理技术的可能性方面，在具有减小的间距的基板上形成图案化特征的方法。 间隔层形成在芯的二维正方形网格上，其厚度被选择为在正方形的角上的四个芯的中心处留下凹坑。 将间隔层回蚀刻以在正方形的中心露出基底。 去除核心材料会导致光刻图形格网格的图案密度增加一倍。 暴露的衬底的区域可以再次用芯材料填充，并且重复该过程以使图案密度增加四倍。

    Self-aligned multi-patterning for advanced critical dimension contacts
    4.
    发明授权
    Self-aligned multi-patterning for advanced critical dimension contacts 有权
    用于高级关键尺寸触点的自对准多图案

    公开(公告)号：US08084310B2

    公开(公告)日：2011-12-27

    申请号：US12603371

    申请日：2009-10-21

    申请人： Bencherki Mebarki ,  Li Yan Miao ,  Christopher Dennis Bencher ,  Jen Shu

    发明人： Bencherki Mebarki ,  Li Yan Miao ,  Christopher Dennis Bencher ,  Jen Shu

    IPC分类号： H01L21/00

    CPC分类号： H01L21/0337

    摘要： Embodiments of the present invention pertain to methods of forming patterned features on a substrate having a reduced pitch in two dimensions as compared to what is possible using standard photolithography processing techniques using a single high-resolution photomask. A spacer layer is formed over a two-dimensional square grid of cores with a thickness chosen to leave a dimple at the center of four cores on the corners of a square. The spacer layer is etched back to reveal the substrate at the centers of the square. Removing the core material results in double the pattern density of the lithographically defined grid of cores. The regions of exposed substrate may be filled again with core material and the process repeated to quadruple the pattern density.

    摘要翻译： 本发明的实施例涉及在使用单个高分辨率光掩模的标准光刻处理技术的可能性方面，在具有减小的间距的基板上形成图案化特征的方法。 间隔层形成在芯的二维正方形网格上，其厚度被选择为在正方形的角上的四个芯的中心处留下凹坑。 将间隔层回蚀刻以在正方形的中心露出基底。 去除核心材料会导致光刻图形格网格的图案密度增加一倍。 暴露的衬底的区域可以再次用芯材料填充，并且重复该过程以使图案密度增加四倍。

    Self aligned double patterning flow with non-sacrificial features
    5.
    发明授权
    Self aligned double patterning flow with non-sacrificial features 有权
    具有非牺牲特征的自对准双图案流

    公开(公告)号：US07972959B2

    公开(公告)日：2011-07-05

    申请号：US12326068

    申请日：2008-12-01

    申请人： Bencherki Mebarki ,  Li Yan Miao ,  Kenlin C. Huang

    发明人： Bencherki Mebarki ,  Li Yan Miao ,  Kenlin C. Huang

    IPC分类号： H01L21/44

    CPC分类号： H01L21/76816 ,  H01L21/0337 ,  H01L21/76837 ,  H01L21/76885

    摘要： Embodiments of the present invention pertain to methods of forming features on a substrate using a self-aligned double patterning (SADP) process. A conformal layer of non-sacrificial material is formed over features of sacrificial structural material patterned near the optical resolution of a photolithography system using a high-resolution photomask. An anisotropic etch of the non-sacrificial layer leaves non-sacrificial ribs above a substrate. A gapfill layer deposited thereon may be etched or polished back to form alternating fill and non-sacrificial features. No hard mask is needed to form the non-sacrificial ribs, reducing the number of processing steps involved.

    摘要翻译： 本发明的实施例涉及使用自对准双图案化（SADP）工艺在衬底上形成特征的方法。 在使用高分辨率光掩模的光刻系统的光学分辨率附近图案化的牺牲结构材料的特征上形成非牺牲材料的共形层。 非牺牲层的各向异性蚀刻在衬底上留下非牺牲肋。 可以将沉积在其上的间隙填充层进行蚀刻或抛光以形成交替的填充和非牺牲特征。 不需要硬掩模来形成非牺牲肋，减少了所涉及的处理步骤的数量。

    SELF ALIGNED DOUBLE PATTERNING FLOW WITH NON-SACRIFICIAL FEATURES
    6.
    发明申请
    SELF ALIGNED DOUBLE PATTERNING FLOW WITH NON-SACRIFICIAL FEATURES 有权
    自定义双向图案非极性特征

    公开(公告)号：US20100136784A1

    公开(公告)日：2010-06-03

    申请号：US12326068

    申请日：2008-12-01

    申请人： Bencherki Mebarki ,  Li Yan Miao ,  Kenlin C. Huang

    发明人： Bencherki Mebarki ,  Li Yan Miao ,  Kenlin C. Huang

    IPC分类号： H01L21/44

    CPC分类号： H01L21/76816 ,  H01L21/0337 ,  H01L21/76837 ,  H01L21/76885

    摘要： Embodiments of the present invention pertain to methods of forming features on a substrate using a self-aligned double patterning (SADP) process. A conformal layer of non-sacrificial material is formed over features of sacrificial structural material patterned near the optical resolution of a photolithography system using a high-resolution photomask. An anisotropic etch of the non-sacrificial layer leaves non-sacrificial ribs above a substrate. A gapfill layer deposited thereon may be etched or polished back to form alternating fill and non-sacrificial features. No hard mask is needed to form the non-sacrificial ribs, reducing the number of processing steps involved.

    摘要翻译： 本发明的实施例涉及使用自对准双图案化（SADP）工艺在衬底上形成特征的方法。 在使用高分辨率光掩模的光刻系统的光学分辨率附近图案化的牺牲结构材料的特征上形成非牺牲材料的共形层。 非牺牲层的各向异性蚀刻在衬底上留下非牺牲肋。 可以将沉积在其上的间隙填充层进行蚀刻或抛光以形成交替的填充和非牺牲特征。 不需要硬掩模来形成非牺牲肋，减少了所涉及的处理步骤的数量。

    HIGH MOBILITY MONOLITHIC P-I-N DIODES
    7.
    发明申请
    HIGH MOBILITY MONOLITHIC P-I-N DIODES 失效
    高移动单晶P-I-N二极体

    公开(公告)号：US20110136327A1

    公开(公告)日：2011-06-09

    申请号：US12824032

    申请日：2010-06-25

    申请人： Xinhai Han ,  Nagarajan Rajagopalan ,  Ji Ae Park ,  Bencherki Mebarki ,  Heung Lak Park ,  Bok Hoen Kim

    发明人： Xinhai Han ,  Nagarajan Rajagopalan ,  Ji Ae Park ,  Bencherki Mebarki ,  Heung Lak Park ,  Bok Hoen Kim

    IPC分类号： H01L21/329 ,  H01L21/203

    CPC分类号： H01L21/0262 ,  H01L21/02532 ,  H01L21/02573 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02603 ,  H01L29/66136 ,  H01L29/868

    摘要： Methods of forming high-current density vertical p-i-n diodes on a substrate are described. The methods include the steps of concurrently combining a group-IV-element-containing precursor with a sequential exposure to an n-type dopant precursor and a p-type dopant precursor in either order. An intrinsic layer is deposited between the n-type and p-type layers by reducing or eliminating the flow of the dopant precursors while flowing the group-IV-element-containing precursor. The substrate may reside in the same processing chamber during the deposition of each of the n-type layer, intrinsic layer and p-type layer and the substrate is not exposed to atmosphere between the depositions of adjacent layers.

    摘要翻译： 描述了在衬底上形成高电流密度垂直p-i-n二极管的方法。 这些方法包括以下步骤：以含有IV族元素的前体和依次暴露于n型掺杂剂前体和p型掺杂剂前体的任一顺序同时组合。 通过在流过含IV族元素的前体的同时减少或消除掺杂剂前体的流动，在n型和p型层之间沉积本征层。 在沉积n型层，本征层和p型层期间，衬底可以驻留在相同的处理室中，并且衬底在相邻层的沉积之间不暴露于大气中。

    High mobility monolithic p-i-n diodes
    9.
    发明授权
    High mobility monolithic p-i-n diodes 失效
    高迁移率单片p-i-n二极管

    公开(公告)号：US08298887B2

    公开(公告)日：2012-10-30

    申请号：US12824032

    申请日：2010-06-25

    申请人： Xinhai Han ,  Nagarajan Rajagopalan ,  Ji Ae Park ,  Bencherki Mebarki ,  Heung Lak Park ,  Bok Hoen Kim

    发明人： Xinhai Han ,  Nagarajan Rajagopalan ,  Ji Ae Park ,  Bencherki Mebarki ,  Heung Lak Park ,  Bok Hoen Kim

    IPC分类号： H01L21/8234

    CPC分类号： H01L21/0262 ,  H01L21/02532 ,  H01L21/02573 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02603 ,  H01L29/66136 ,  H01L29/868

    摘要： Methods of forming high-current density vertical p-i-n diodes on a substrate are described. The methods include the steps of concurrently combining a group-IV-element-containing precursor with a sequential exposure to an n-type dopant precursor and a p-type dopant precursor in either order. An intrinsic layer is deposited between the n-type and p-type layers by reducing or eliminating the flow of the dopant precursors while flowing the group-IV-element-containing precursor. The substrate may reside in the same processing chamber during the deposition of each of the n-type layer, intrinsic layer and p-type layer and the substrate is not exposed to atmosphere between the depositions of adjacent layers.

    摘要翻译： 描述了在衬底上形成高电流密度垂直p-i-n二极管的方法。 这些方法包括以下步骤：以含有IV族元素的前体和依次暴露于n型掺杂剂前体和p型掺杂剂前体的任一顺序同时组合。 通过在流过含IV族元素的前体的同时减少或消除掺杂剂前体的流动，在n型和p型层之间沉积本征层。 在沉积n型层，本征层和p型层期间，衬底可以驻留在相同的处理室中，并且衬底在相邻层的沉积之间不暴露于大气中。