公开(公告)号：US6042996A

公开(公告)日：2000-03-28

申请号：US59071

申请日：1998-04-13

Applicant: Benjamin Szu-Min Lin ,  Fang-Ching Chao

Inventor： Benjamin Szu-Min Lin ,  Fang-Ching Chao

IPC: G03F1/00 ,  H01L21/027 ,  H01L21/311 ,  H01L21/768 ,  G03F7/00

CPC classification number: H01L21/0274 ,  H01L21/31144 ,  H01L21/76807 ,  H01L2221/1021

Abstract: A method of fabricating a dual damascene structure is provided comprising forming a photoresist layer on a dielectric layer. A mask including a region that light completely passes over, a region that light partially passes over and a dense region is used for exposure. A development step is carried out to remove the photoresist layer under the region that light completely passes over, to partially remove the photoresist layer under the region that light partially passes over and to leave the photoresist layer under the dense region. The photoresist layer remaining from the forgoing step and the dielectric layer are partially removed to form a via and a trench in the dielectric layer. The via and the trench are filled with metal to form a dual damascene structure.

Abstract translation: 提供一种制造双镶嵌结构的方法，包括在电介质层上形成光致抗蚀剂层。 包括光完全通过的区域，光部分通过的区域和致密区域的掩模用于曝光。 进行显影步骤以在光完全通过的区域下去除光致抗蚀剂层，以在光部分通过的区域部分去除光致抗蚀剂层，并将光致抗蚀剂层留在致密区域下方。 从前述步骤残留的光致抗蚀剂层和电介质层被部分去除以在电介质层中形成通孔和沟槽。 通孔和沟槽用金属填充以形成双镶嵌结构。

公开(公告)号：US20100321656A1

公开(公告)日：2010-12-23

申请号：US12868257

申请日：2010-08-25

Applicant: Hang Yip Liu ,  Sebastian Schmidt ,  Benjamin Szu-Min Lin

Inventor： Hang Yip Liu ,  Sebastian Schmidt ,  Benjamin Szu-Min Lin

IPC: G03B27/42 ,  G03F1/00

CPC classification number: G03F1/36 ,  G03F1/50 ,  G03F7/70283

Abstract: A system and method to compensate for the proximity effects in the imaging of patterns in a photolithography process. A light exposure of a photoresist layer is effectuated in predetermined patterns through an exposure mask having light-transmissive openings in correspondence to the predetermined patterns. The exposure mask has areas densely populated with the light-transmissive openings and areas sparsely populated with the light-transmissive openings. Light is attenuated through the densely populated light-transmissive openings by a different amount than through the sparsely populated light-transmissive openings.

Abstract translation: 一种用于补偿光刻工艺中图案成像中的邻近效应的系统和方法。 通过具有对应于预定图案的透光开口的曝光掩模，以预定图案实现光致抗蚀剂层的曝光。 曝光掩模具有由透光开口和由透光开口稀疏地填充的区域密集地区域。 光通过密集居住的透光开口被衰减不同于通过疏散人口的透光开口的量。

公开(公告)号：US20080055597A1

公开(公告)日：2008-03-06

申请号：US11467930

申请日：2006-08-29

Applicant: Jie-Wei Sun ,  Wen-Kai Hung ,  Benjamin Szu-Min Lin

Inventor： Jie-Wei Sun ,  Wen-Kai Hung ,  Benjamin Szu-Min Lin

IPC: G01J4/00 ,  G01B11/14

CPC classification number: G01B11/24 ,  G01N21/211 ,  G01N21/956 ,  G01N2021/213

Abstract: A method for characterizing line width roughness of printed features is provided. A wafer having thereon a plurality of gratings formed within a test key region is prepared. The wafer is transferred to a spectroscopic ellipsometry tool having a light source, a detector and a computer. A polarized light beam emanated from the light source is directed onto the gratings. Spectrum data of reflected light is measured and recorded. The spectrum data is compared to a library linked to the computer in real time. The library contains a plurality of contact-hole model based spectra created by incorporating parameter values that describes the line width roughness. The spectrum data is matched with the contact-hole model based spectra, thereby determining the parameter values.

Abstract translation: 提供了一种表征印刷特征线宽粗糙度的方法。 制备其上具有形成在测试键区域内的多个光栅的晶片。 将晶片转移到具有光源，检测器和计算机的分光椭圆仪。 从光源发出的偏振光束被引导到光栅上。 测量和记录反射光的光谱数据。 将频谱数据与实时连接到计算机的库进行比较。 该库包含通过引入描述线宽粗糙度的参数值而创建的多个基于接触孔模型的光谱。 光谱数据与基于接触孔模型的光谱匹配，从而确定参数值。

公开(公告)号：US06866967B2

公开(公告)日：2005-03-15

申请号：US10190197

申请日：2002-07-03

Applicant: Benjamin Szu-Min Lin

Inventor： Benjamin Szu-Min Lin

IPC: G03F1/00 ,  G03F1/32 ,  G03F1/36 ,  G03F9/00

CPC classification number: G03F1/32

Abstract: A phase shifting mask is disclosed in this present invention. The above-mentioned phase shifting mask comprises a quartz layer and a plurality of transmission adjustor layer onto the quartz layer. By employing the above-mentioned phase shifting mask, the material of the transmission adjustors has not to be changed with the light source. Furthermore, the contrast of the phase shifting mask of this invention is better than the contrast of the binary mask and the half-tone mask in the prior art. Therefore, this invention provides a more efficient mask, and the phase shifting mask according to this present invention can improve the resolution in photolithography.

Abstract translation: 在本发明中公开了一种相移掩模。 上述相移掩模包括石英层和在石英层上的多个透射调节层。 通过采用上述相移掩模，传输调节器的材料不会随着光源而改变。 此外，本发明的相移掩模的对比度优于现有技术中二进制掩模和半色调掩模的对比度。 因此，本发明提供了更有效的掩模，根据本发明的相移掩模可以提高光刻中的分辨率。

公开(公告)号：US06296974B1

公开(公告)日：2001-10-02

申请号：US09391321

申请日：1999-09-08

Applicant: Benjamin Szu-Min Lin

Inventor： Benjamin Szu-Min Lin

IPC: G03P900

CPC classification number: G03F7/0035 ,  G03F1/58

Abstract: This invention provides a method of forming a multi-layer photo mask on a photo mask substrate. A first transparent layer comprising at least one vertical side wall is formed on at least one predetermined area of the photo mask substrate. A first opaque spacer is formed around the vertical side wall of the first transparent layer, and the top side of the first spacer is approximately leveled off with the upper surface of the first transparent layer. An external transparent layer is formed on the photo mask substrate and outside the predetermined area, and the upper surface of the external transparent layer is leveled off with that of the first transparent layer. So the first transparent layer and the external transparent layer form a first photo mask layer. A second transparent layer comprising at least one vertical side wall is formed on at least one predetermined area of the first photo mask layer. A second opaque spacer is formed around the vertical side wall of the second transparent layer, and the top side of the second spacer is approximately leveled off with the upper surface of the second transparent layer.

Abstract translation: 本发明提供了在光掩模基板上形成多层光掩膜的方法。 包括至少一个垂直侧壁的第一透明层形成在光掩模基板的至少一个预定区域上。 在第一透明层的垂直侧壁周围形成第一不透明间隔物，并且第一间隔物的顶侧与第一透明层的上表面几乎平齐。 在光掩模基板上形成外部透明层，在规定区域外形成外部透明层，外部透明层的上表面与第一透明层的上表面平齐。 因此，第一透明层和外部透明层形成第一光掩模层。 包括至少一个垂直侧壁的第二透明层形成在第一光掩模层的至少一个预定区域上。 在第二透明层的垂直侧壁周围形成第二不透明间隔物，并且第二间隔物的顶侧与第二透明层的上表面大致平齐。

公开(公告)号：US06187669B1

公开(公告)日：2001-02-13

申请号：US09391326

申请日：1999-09-08

Applicant: Jung-Chao Chiou ,  Benjamin Szu-Min Lin

Inventor： Jung-Chao Chiou ,  Benjamin Szu-Min Lin

IPC: H01L214763

CPC classification number: H01L27/10855 ,  H01L21/76897 ,  H01L27/0207 ,  H01L27/10885

Abstract: This invention provides a method of forming a node contact with self-alignment on a semiconductor wafer. The wafer comprises a substrate, a dielectric layer, and a first and a second bit lines. A first side wall of the first bit line is adjacent to a second side wall of the second bit line and comprises a first region and two second regions adjacent to the first region. The distance between the first region and the second side wall is greater than a predetermined value and the distance between the two second regions and the second side wall is less than the predetermined value. A second insulating layer is formed on the dielectric layer and two bit lines to form a groove over the gap between the first region and the second side wall. A first anisotropic etching is performed to extend the bottom of the groove down to the dielectric layer. The remaining second insulating layer around the groove forms a spacer, and the remaining second insulating layer in the gaps between the two second regions and the second side wall still completely covers the surface of the two gaps. A second anisotropic etching process is performed to remove the dielectric layer at the bottom of the groove in a vertical direction down to the substrate so as to form the node contact.

Abstract translation: 本发明提供一种在半导体晶片上形成具有自对准的节点接触的方法。 晶片包括衬底，电介质层以及第一和第二位线。 第一位线的第一侧壁与第二位线的第二侧壁相邻并且包括与第一区域相邻的第一区域和两个第二区域。 第一区域和第二侧壁之间的距离大于预定值，并且两个第二区域和第二侧壁之间的距离小于预定值。 第二绝缘层形成在电介质层和两个位线之间以在第一区域和第二侧壁之间的间隙上形成沟槽。 执行第一各向异性蚀刻以将凹槽的底部向下延伸到电介质层。 围绕凹槽的剩余的第二绝缘层形成间隔物，并且在两个第二区域和第二侧壁之间的间隙中的剩余的第二绝缘层仍完全覆盖两个间隙的表面。 进行第二种各向异性蚀刻工艺以在垂直方向上去除凹槽底部的电介质层，以便形成节点接触。

公开(公告)号：US6071656A

公开(公告)日：2000-06-06

申请号：US349209

申请日：1999-07-07

Applicant: Benjamin Szu-Min Lin

Inventor： Benjamin Szu-Min Lin

IPC: G03F9/00

CPC classification number: G03F9/7084

Abstract: A photolithography technique. A chip has latitudinal scribe lines and longitudinal scribe lines and also has a plurality of alignment marks. The latitudinal scribe lines and longitudinal scribe lines divide the chip into a plurality of dies. Some dies are effective dies. Alignment marks are located at each intersection of the latitudinal and longitudinal scribe lines. Each shot contains a plurality of dies. A mask having a plurality of mask alignment marks is provided. The mask alignment marks are used for alignment with alignment marks in the chip. The alignment marks of the chip are aligned with the mask alignment marks of the mask. At least three alignment marks close to the effective dies in the shots are selected for detection a focus and focal plane of each shot, so as to level the shot and perform an exposure step on each shot, shot by shot.

Abstract translation: 光刻技术。 芯片具有纬向划痕线和纵向划痕线，并且还具有多个对准标记。 横向划痕线和纵向划痕线将芯片分成多个模具。 一些死亡是有效的死亡。 对准标记位于纬向和纵向划线的每个交叉处。 每个镜头包含多个模具。 提供具有多个掩模对准标记的掩模。 掩模对准标记用于与芯片中的对准标记对准。 芯片的对准标记与掩模的掩模对准标记对准。 选择靠近射击中的有效管芯的至少三个对准标记用于检测每个镜头的焦点和焦平面，以便对镜头进行调平，并对每个镜头执行曝光步骤。

公开(公告)号：US6048650A

公开(公告)日：2000-04-11

申请号：US139487

申请日：1998-08-25

Applicant: Benjamin Szu-Min Lin

Inventor： Benjamin Szu-Min Lin

IPC: H01L21/027 ,  G03F1/32 ,  G03F1/42 ,  G03F1/68 ,  G03F9/00

CPC classification number: G03F1/32 ,  G03F1/42

Abstract: A half-tone phase shifting mask (HTPSM) with a back surface blind border alignment mark includes a shifter layer with a desired pattern on one surface of a transparent substrate, and a light shielding layer with a mark opening on another surface of the transparent substrate. In this case, the light ray passing through the mark opening is partially shielded by the shifter layer so that there is no light amplitude subtraction within the mark opening.

Abstract translation: 具有背面盲边对准标记的半色调相移掩模（HTPSM）包括在透明基板的一个表面上具有期望图案的移位层，以及在透明基板的另一表面上具有标记开口的遮光层 。 在这种情况下，通过标记开口的光线被移位层部分屏蔽，使得在标记开口内没有光振幅减法。

公开(公告)号：US6007950A

公开(公告)日：1999-12-28

申请号：US84765

申请日：1998-05-26

Applicant: Benjamin Szu-Min Lin

Inventor： Benjamin Szu-Min Lin

IPC: G03F1/30 ,  G03F9/00

CPC classification number: G03F1/30

Abstract: A method for fabricating an alternating phase shifting mask includes a transparent substrate, a number of oblique layers formed on the transparent substrate, and a number of embedded phase shift layers inside the transparent substrate. Then, a photolithography process is applied to form a photoresist layer on the transparent substrate corresponding to a desired pattern and, therefore, exposing a portion of the transparent substrate. Then, an ion implantation process utilizing the photoresist layer as a mask is applied to form the embedded phase shift layers and the photoresist layer is removed after ion implantation. The embedded phase shift layers are formed in alternating positions in the transparent portion between the oblique layers.

Abstract translation: 交替移相掩模的制造方法包括透明基板，在透明基板上形成的多个倾斜层，以及透明基板内部的多个嵌入式相移层。 然后，应用光刻工艺在透明衬底上形成对应于所需图案的光致抗蚀剂层，因此暴露透明衬底的一部分。 然后，使用利用光致抗蚀剂层作为掩模的离子注入工艺以形成嵌入式相移层，并且在离子注入之后去除光致抗蚀剂层。 嵌入式相移层形成在倾斜层之间的透明部分中的交替位置。

公开(公告)号：US07633601B2

公开(公告)日：2009-12-15

申请号：US11308245

申请日：2006-03-14

Applicant: Yong-Fa Huang ,  Benjamin Szu-Min Lin ,  Chun-Chi Yu ,  Huan-Ting Tseng ,  Bo-Jou Lu

Inventor： Yong-Fa Huang ,  Benjamin Szu-Min Lin ,  Chun-Chi Yu ,  Huan-Ting Tseng ,  Bo-Jou Lu

IPC: G03B27/32

CPC classification number: G03F7/70341 ,  G03F7/70533

Abstract: To avoid the yield of wafers that undergo immersion lithography influencing by delay of post exposure baking (PEB), an operation system adjusts a speed of inputting the wafers to undergo immersion lithography according to a status of wafers that have finished exposure and are waiting for baking. Therefore, the wafers that have finished exposure are transmitted to be baked efficiently and on time.

Abstract translation: 为了避免经历后曝光烘烤（PEB）延迟影响的浸没光刻的晶片的产量，操作系统根据已经完成曝光并正在等待烘焙的晶片的状态来调节输入晶片以进行浸渍光刻的速度 。 因此，已经完成曝光的晶片被传输以有效地并且准时地被烘烤。