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1.发明授权System and method for coordinating activation of a plurality of modules through the use of synchronization cells comprising a latch and regulating circuits 失效用于通过使用包括锁存器和调节电路的同步单元来协调多个模块的激活的系统和方法公开(公告)号：US06772358B1
公开(公告)日：2004-08-03
申请号：US09491327
申请日：2000-01-26
申请人： Bernard Plessier , Tien-Dung Do
发明人： Bernard Plessier , Tien-Dung Do
IPC分类号： G06F104
CPC分类号： G06F1/04 , G06F9/3869
摘要： In the field of systems for the synchronization of modular electronic circuits, a system is provided for the coordinated activation of the modules. This system includes synchronization cells that have their pace set by a primary clock signal and deliver secondary clock signals controlled intermittently by the enabling signals to respectively activate the modules. The cells lock the state of each enabling signal associated with a regulator for regulating the periodicity of the change in state of each secondary clock signal and coordinating the changes in states of the secondary clock signals with one another. The system can be advantageously applied to electronic circuits having very high frequency data processing modules, especially those providing for the multiplexing of the transmissions of data carried out by each module.
摘要翻译： 在用于模块化电子电路同步的系统领域中，提供了用于模块的协调激活的系统。 该系统包括通过主时钟信号设置其步调的同步单元，并且通过使能信号间歇地控制辅助时钟信号来分别激活模块。 单元锁定与调节器相关联的每个使能信号的状态，以调节每个辅助时钟信号的状态变化的周期性，并且协调辅助时钟信号的状态的变化。 该系统可以有利地应用于具有非常高频率数据处理模块的电子电路，特别是那些提供由每个模块执行的数据的传输的复用的那些。
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2.发明授权Circuit for filtering a signal and integrated circuit comprising such a circuit 失效用于滤波信号的电路和包括这种电路的集成电路
公开(公告)号：US5467053A
公开(公告)日：1995-11-14
申请号：US286485
申请日：1994-08-04
申请人： Sylvie Wuidart , Tien-Dung Do
发明人： Sylvie Wuidart , Tien-Dung Do
IPC分类号： H03K5/19 , H03K5/1252 , H03K5/13 , H03K3/017 , H03K5/14
CPC分类号： H03K5/1252 , H03K5/133
摘要： A circuit for the filtering of a pulse signal comprises means to detect an output pulse upon the detection of an input pulse, the shape of this output pulse being based on elementary delays obtained by the charging and discharging of capacitors. During the generation of the output pulse, no new input pulse can be taken into account.
摘要翻译： 用于滤波脉冲信号的电路包括在检测输入脉冲时检测输出脉冲的装置，该输出脉冲的形状基于通过电容器的充电和放电获得的基本延迟。 在产生输出脉冲期间，不能考虑新的输入脉冲。
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公开(公告)号：US5815030A
公开(公告)日：1998-09-29
申请号：US507905
申请日：1995-07-28
申请人： Sylvie Wuidart , Tien-Dung Do
发明人： Sylvie Wuidart , Tien-Dung Do
IPC分类号： H03K5/19 , H03K5/1252 , H03K5/13 , H03K3/017 , H03K5/14
CPC分类号： H03K5/1252 , H03K5/133
摘要： A circuit for the filtering of a pulse signal comprises means to detect an output pulse upon the detection of an input pulse, the shape of this output pulse being based on elementary delays obtained by the charging and discharging of capacitors. During the generation of the output pulse, no new input pulse can be taken into account.
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公开(公告)号：US5999040A
公开(公告)日：1999-12-07
申请号：US044457
申请日：1998-03-19
CPC分类号： H02M3/073
摘要： A voltage booster circuit including an input for receiving a supply voltage, a plurality of stages for producing an output voltage from the supply voltage by the transfer of charges between at least two of the plurality of stages, and circuit for coupling and decoupling stages to vary the number of stages operatively connected together. A method for producing an output voltage from a supply voltage by using a voltage booster circuit, the circuit includes an input for receiving the supply voltage, a plurality of stages, and a selection switch for the selective isolation of the stages or for the selective connection of the stage. The method includes the following steps: starting the circuit; comparing the value of the output voltage with a decrementation threshold; and decreasing the number of stages which are connected if the decrementation threshold is reached by the value of the output voltage.
摘要翻译： 一种升压电路，包括用于接收电源电压的输入端，用于通过在所述多个级中的至少两个之间传送电荷而从所述电源电压产生输出电压的多个级和用于耦合和去耦阶段的电路 可操作地连接在一起的级数。 一种通过使用升压电路从电源电压产生输出电压的方法，该电路包括用于接收电源电压的输入端，多级级和用于级选择性隔离或用于选择性连接的选择开关 的舞台。 该方法包括以下步骤：启动电路; 将输出电压的值与减量阈值进行比较; 并且如果通过输出电压的值达到递减阈值，则减少连接的级数。
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公开(公告)号：US5859526A
公开(公告)日：1999-01-12
申请号：US871096
申请日：1997-06-06
申请人： Tien-Dung Do , Mathieu Lisart
发明人： Tien-Dung Do , Mathieu Lisart
摘要： A voltage reference generator includes a voltage source and a differential amplifier. The voltage source supplies a stable voltage reference to a positive input of the differential amplifier which is configured as a follower having its output looped back to its negative input. The negative feedback loop is a variable-resistance loop that is controlled by the output of the differential amplifier. The variable-resistance feedback loop transiently imposes open-loop operation when the voltage reference generator is turned on so as to provide high current to the output before imposing closed-loop operation in follower mode.
摘要翻译： 电压基准发生器包括电压源和差分放大器。 电压源为差分放大器的正输入提供稳定的参考电压，差分放大器的正输入被配置为具有循环回到其负输入的引导器。 负反馈回路是由差分放大器的输出控制的可变电阻回路。 当电压基准发生器导通时，可变电阻反馈环路瞬时施加开环操作，以便在跟随器模式下施加闭环操作之前向输出端提供高电流。
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公开(公告)号：US5841270A
公开(公告)日：1998-11-24
申请号：US685434
申请日：1996-07-23
申请人： Tien-Dung Do , David Naura
发明人： Tien-Dung Do , David Naura
CPC分类号： G05F3/245 , G05F3/247 , Y10S323/907
摘要： A reference generator implemented in a MOS technology integrated circuit comprises a current mirror device having three pairs of transistors connected so as to obtain a stable voltage at the mid point of its second arm. This same generator also supplies a stable current.
摘要翻译： 在MOS技术集成电路中实现的参考发生器包括具有三对晶体管的电流镜装置，其连接以在其第二臂的中点处获得稳定的电压。 同样的发电机也提供稳定的电流。
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公开(公告)号：US5714899A
公开(公告)日：1998-02-03
申请号：US779332
申请日：1997-01-06
申请人： Sylvie Wuidart , Tien-Dung Do
发明人： Sylvie Wuidart , Tien-Dung Do
摘要： A circuit for the generation of a time-stabilized output pulse Iout comprises a capacitor biased by two completely independent voltages whose bias voltages are filed by a current generator through current mirrors and are therefore very stable.
摘要翻译： 用于产生时间稳定的输出脉冲Iout的电路包括由两个完全独立的电压偏置的电容器，其偏置电压由电流发生器通过电流镜提供，因此非常稳定。
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公开(公告)号：US5469100A
公开(公告)日：1995-11-21
申请号：US260705
申请日：1994-06-16
申请人： Sylvie Wuidart , Tien-Dung Do
发明人： Sylvie Wuidart , Tien-Dung Do
摘要： A circuit for the generation of a time-stabilized output pulse Iout comprises a capacitor biased by two completely independent voltages whose bias voltages are fixed by a current generator through current mirrors and are therefore very stable.
摘要翻译： 用于产生时间稳定的输出脉冲Iout的电路包括由两个完全独立的电压偏置的电容器，其偏压通过电流反射镜由电流发生器固定，因此非常稳定。
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