公开(公告)号：US07426143B2

公开(公告)日：2008-09-16

申请号：US11407969

申请日：2006-04-21

申请人： Bo-Geun Kim ,  Heung-Soo Lim ,  Jae-Woo Im

发明人： Bo-Geun Kim ,  Heung-Soo Lim ,  Jae-Woo Im

IPC分类号： G11C11/34 ,  G11C16/06

CPC分类号： G11C16/12 ,  G11C16/3454

摘要： A NOR flash memory device and related programming method are disclosed. The programming method includes programming data in a memory cell and, during a program verification operation, controlling the supply of current from a sense amplifier to the memory cell in relation to the value of the programmed data. Wherein a program verification operation is indicated, current is provided from the sense amplifier to the memory cell. Where a program verification operation is not indicated, current is cut off from the sense amplifier.

摘要翻译： 公开了一种NOR闪存器件及相关编程方法。 编程方法包括在存储器单元中编程数据，并且在程序验证操作期间，相对于编程数据的值控制从读出放大器到存储单元的电流供应。 其中指示程序验证操作，从读出放大器向存储单元提供电流。 在没有指示程序验证操作的情况下，从感测放大器切断电流。

公开(公告)号：US07742341B2

公开(公告)日：2010-06-22

申请号：US12190215

申请日：2008-08-12

申请人： Bo-Geun Kim ,  Heung-Soo Lim ,  Jae-Woo Im

发明人： Bo-Geun Kim ,  Heung-Soo Lim ,  Jae-Woo Im

IPC分类号： G11C16/06

CPC分类号： G11C16/12 ,  G11C16/3454

摘要： A NOR flash memory device and related programming method are disclosed. The programming method includes programming data in a memory cell and, during a program verification operation, controlling the supply of current from a sense amplifier to the memory cell in relation to the value of the programmed data. Wherein a program verification operation is indicated, current is provided from the sense amplifier to the memory cell. Where a program verification operation is not indicated, current is cut off from the sense amplifier.

摘要翻译： 公开了一种NOR闪存器件及相关编程方法。 编程方法包括在存储器单元中编程数据，并且在程序验证操作期间，相对于编程数据的值控制从读出放大器到存储单元的电流供应。 其中指示程序验证操作，从读出放大器向存储单元提供电流。 在没有指示程序验证操作的情况下，从感测放大器切断电流。

公开(公告)号：US20070025158A1

公开(公告)日：2007-02-01

申请号：US11407969

申请日：2006-04-21

申请人： Bo-Geun Kim ,  Heung-Soo Lim ,  Jae-Woo Im

发明人： Bo-Geun Kim ,  Heung-Soo Lim ,  Jae-Woo Im

IPC分类号： G11C11/34 ,  G11C16/06

CPC分类号： G11C16/12 ,  G11C16/3454

摘要： A NOR flash memory device and related programming method are disclosed. The programming method includes programming data in a memory cell and, during a program verification operation, controlling the supply of current from a sense amplifier to the memory cell in relation to the value of the programmed data. Wherein a program verification operation is indicated, current is provided from the sense amplifier to the memory cell. Where a program verification operation is not indicated, current is cut off from the sense amplifier.

摘要翻译： 公开了一种NOR闪存器件及相关编程方法。 编程方法包括在存储器单元中编程数据，并且在程序验证操作期间，相对于编程数据的值控制从读出放大器到存储单元的电流供应。 其中指示程序验证操作，从读出放大器向存储单元提供电流。 在没有指示程序验证操作的情况下，从感测放大器切断电流。

公开(公告)号：US07161839B2

公开(公告)日：2007-01-09

申请号：US11025016

申请日：2004-12-28

申请人： Jae-Woo Im

发明人： Jae-Woo Im

IPC分类号： G11C11/34

CPC分类号： G11C16/10

摘要： A non-volatile memory device and a program method thereof are provided. Data is scanned to search data bits to be practically programmed. The searched data bits are simultaneously programmed as many times as a predetermined number. Since data scanning and programming are conducted using a pipeline processing, an average time required for programming data is effectively shortened.

摘要翻译： 提供了一种非易失性存储器件及其编程方法。 扫描数据以搜索数据位以进行实际编程。 搜索到的数据位同时被编程为预定数量的多次。 由于使用流水线处理进行数据扫描和编程，因此有效地缩短了编程数据所需的平均时间。

公开(公告)号：US20060109714A1

公开(公告)日：2006-05-25

申请号：US11206586

申请日：2005-08-17

申请人： Jae-Woo Im

发明人： Jae-Woo Im

IPC分类号： G11C16/04

CPC分类号： G11C16/102

摘要： A circuit for indicating termination of scan of bits to be programmed in a nonvolatile semiconductor memory device includes a counting unit, a set bit number provision unit and a comparison unit. The counting unit counts the predetermined number of bits to be programmed, and provides a group of counting bit signals indicating the number of bits to be programmed. The set bit number provision unit provides a group of set bit signals indicating the number of set bits. The number of set bits can be externally controlled. The comparison unit compares the group of counting bit signals with the group of set bit signals and ultimately provides a scan termination signal used to control programming for the memory array. The logic level of the scan termination signal is changed when the number of bits to be programmed attains the number of set bits. Accordingly, a designer or user of a nonvolatile semiconductor memory device can adjust the number of bits to be simultaneously programmed, and the time required for a complete program operation can be shortened.

摘要翻译： 用于指示在非易失性半导体存储器件中要编程的位的扫描结束的电路包括计数单元，设定位数提供单元和比较单元。 计数单元对要编程的预定位数进行计数，并提供指示要编程的位数的一组计数位信号。 设置位数提供单元提供指示设置位数的一组置位信号。 设置位的数量可以从外部控制。 比较单元将一组计数位信号与置位位信号组进行比较，最终提供用于控制存储器阵列编程的扫描终止信号。 当待编程的位数达到设定位数时，扫描终止信号的逻辑电平就会改变。 因此，非易失性半导体存储器件的设计者或用户可以调整要同时编程的位数，并且可以缩短完成程序操作所需的时间。

公开(公告)号：US07933150B2

公开(公告)日：2011-04-26

申请号：US12899884

申请日：2010-10-07

申请人： Jae-Woo Im

发明人： Jae-Woo Im

IPC分类号： G11C16/04

CPC分类号： G11C16/10 ,  G11C11/5628 ,  G11C16/3454 ,  G11C2211/5621

摘要： A nonvolatile semiconductor memory device and a programming method thereof are provided. The programming method includes first programming a cell among a plurality of adjacent memory cells to the highest threshold voltage distribution corresponding to a data state, and subsequently programming the other adjacent cells to the lower threshold voltage distributions corresponding to second and third data states. The second data state and the third data state may have the second highest threshold voltage distribution and the third highest threshold voltage distribution, respectively, or the third highest threshold voltage distribution and the second highest threshold voltage distribution, respectively.

摘要翻译： 提供了一种非易失性半导体存储器件及其编程方法。 编程方法包括首先将多个相邻存储器单元之间的单元编程为对应于数据状态的最高阈值电压分布，然后将其它相邻单元编程为对应于第二和第三数据状态的较低阈值电压分布。 第二数据状态和第三数据状态可以分别具有第二高阈值电压分布和第三高阈值电压分布，或者分别具有第三高阈值电压分布和第二高阈值电压分布。

公开(公告)号：US20080175047A1

公开(公告)日：2008-07-24

申请号：US11765057

申请日：2007-06-19

申请人： Jae-Woo Im

发明人： Jae-Woo Im

IPC分类号： G11C16/06 ,  G11C11/34

CPC分类号： G11C16/10 ,  G11C11/5628 ,  G11C16/3454 ,  G11C2211/5621

摘要： A nonvolatile semiconductor memory device and a programming method thereof are provided. The programming method includes first programming a cell among a plurality of adjacent memory cells to the highest threshold voltage distribution corresponding to a data state, and subsequently programming the other adjacent cells to the lower threshold voltage distributions corresponding to second and third data states. The second data state and the third data state may have the second highest threshold voltage distribution and the third highest threshold voltage distribution, respectively, or the third highest threshold voltage distribution and the second highest threshold voltage distribution, respectively.

摘要翻译： 提供了一种非易失性半导体存储器件及其编程方法。 编程方法包括首先将多个相邻存储器单元之间的单元编程为对应于数据状态的最高阈值电压分布，然后将其它相邻单元编程为对应于第二和第三数据状态的较低阈值电压分布。 第二数据状态和第三数据状态可以分别具有第二高阈值电压分布和第三高阈值电压分布，或者分别具有第三高阈值电压分布和第二高阈值电压分布。

公开(公告)号：US20110019472A1

公开(公告)日：2011-01-27

申请号：US12899884

申请日：2010-10-07

申请人： Jae-Woo Im

发明人： Jae-Woo Im

IPC分类号： G11C16/04

CPC分类号： G11C16/10 ,  G11C11/5628 ,  G11C16/3454 ,  G11C2211/5621

摘要： A nonvolatile semiconductor memory device and a programming method thereof are provided. The programming method includes first programming a cell among a plurality of adjacent memory cells to the highest threshold voltage distribution corresponding to a data state, and subsequently programming the other adjacent cells to the lower threshold voltage distributions corresponding to second and third data states. The second data state and the third data state may have the second highest threshold voltage distribution and the third highest threshold voltage distribution, respectively, or the third highest threshold voltage distribution and the second highest threshold voltage distribution, respectively.

摘要翻译： 提供了一种非易失性半导体存储器件及其编程方法。 编程方法包括首先将多个相邻存储器单元之间的单元编程为对应于数据状态的最高阈值电压分布，然后将其它相邻单元编程为对应于第二和第三数据状态的较低阈值电压分布。 第二数据状态和第三数据状态可以分别具有第二高阈值电压分布和第三高阈值电压分布，或者分别具有第三高阈值电压分布和第二高阈值电压分布。

公开(公告)号：US07580322B2

公开(公告)日：2009-08-25

申请号：US11249095

申请日：2005-10-11

申请人： Jae-Woo Im

发明人： Jae-Woo Im

IPC分类号： G11C8/00

CPC分类号： G11C16/10

摘要： A nonvolatile memory device is programmed by selectively scanning input data bits to detect data bits to be programmed, and programming the detected data bits. The detected data bits may be programmed in predetermined units. The input data bits may be selectively scanned by combining input data bits in groups, thereby generating combinational information, and generating address information in response to the combinational information.

摘要翻译： 通过选择性地扫描输入数据位来检测要编程的数据位，并对检测到的数据位进行编程来对非易失性存储器件进行编程。 检测到的数据位可以以预定单位编程。 可以通过组合输入数据位来选择性地扫描输入数据位，从而产生组合信息，并响应于组合信息产生地址信息。

公开(公告)号：US20060067131A1

公开(公告)日：2006-03-30

申请号：US11025016

申请日：2004-12-28

申请人： Jae-Woo Im

发明人： Jae-Woo Im

IPC分类号： G11C16/04

CPC分类号： G11C16/10

摘要： A non-volatile memory device and a program method thereof are provided. Data is scanned to search data bits to be practically programmed. The searched data bits are simultaneously programmed as many times as a predetermined number. Since data scanning and programming are conducted using a pipeline processing, an average time required for programming data is effectively shortened.

摘要翻译： 提供了一种非易失性存储器件及其编程方法。 扫描数据以搜索数据位以进行实际编程。 搜索到的数据位同时被编程为预定数量的多次。 由于使用流水线处理进行数据扫描和编程，因此有效地缩短了编程数据所需的平均时间。