-
公开(公告)号:US12283248B1
公开(公告)日:2025-04-22
申请号:US18577444
申请日:2023-03-29
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Chengyuan Luo , Pan Xu , Ying Han , Donghui Zhao , Guangshuang Lv , Xing Zhang , Miao Liu , Xing Yao , Cheng Xu
IPC: G09G3/3266 , H10K59/131
Abstract: The present disclosure provides a circuitry structure and a display substrate. The circuitry structure includes a base substrate, and a functional transistor and a signal transmission line arranged on the base substrate. The functional transistor includes a first conductive connection member, a first electrode, a second electrode, at least two gate electrode patterns and at least one active pattern. Orthogonal projections of the first electrode, the second electrode and the at least two gate electrode patterns onto the base substrate at least partially overlap with an orthogonal projection of the active pattern onto the base substrate, and first ends of the gate electrode patterns are coupled to each other. The first conductive connection member is arranged at a layer different from the gate electrode pattern, and coupled to second ends of the gate electrode patterns. The signal transmission line is coupled to the first conductive connection member.
-
公开(公告)号:US11663976B2
公开(公告)日:2023-05-30
申请号:US17363639
申请日:2021-06-30
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Xing Yao , Chen Xu , Jingquan Wang , Xinyin Wu
IPC: G09G3/3266 , H01L27/32
CPC classification number: G09G3/3266 , H01L27/3272 , H01L27/3276 , G09G2300/0426 , G09G2310/0286
Abstract: A display substrate is provided. The display substrate includes a base substrate including a display region and a peripheral region, and a gate scan driving circuit, a light-emitting control scan driving circuit, and a first power line, the gate scan driving circuit includes a first stabilizing capacitor, a first electrode plate of the first stabilizing capacitor is electrically connected to the output terminal of the gate scan driving circuit; and the light-emitting control scan driving circuit includes a second stabilizing capacitor, a first electrode plate of the second stabilizing capacitor is electrically connected to the output terminal, a second electrode plate of the second stabilizing capacitor is electrically connected to the first power line, the second electrode plate of the second stabilizing capacitor includes a first part and a second part, and an organic insulation layer is provided between the first part and the second part.
-
公开(公告)号:US11263951B2
公开(公告)日:2022-03-01
申请号:US16336546
申请日:2018-08-14
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Zhichong Wang , Haoliang Zheng , Seungwoo Han , Guangliang Shang , Lijun Yuan , Xing Yao , Mingfu Han
Abstract: Disclosed is a shift register unit, including a first input circuit, an input control circuit, a pull-down control circuit, a pull-down circuit, an output circuit and a second input circuit. The first input circuit includes a first input sub-circuit, and is configured to, under control of the first signal input terminal, cause a voltage of the first voltage terminal to be output to a second terminal of the first input sub-circuit and output to the pull-up node via a first terminal thereof. The input control circuit is configured to pull down a potential of the second terminal to the potential of a first power supply voltage terminal under control of an enable signal terminal.
-
4.
公开(公告)号:US11250750B2
公开(公告)日:2022-02-15
申请号:US16126032
申请日:2018-09-10
Applicant: BOE Technology Group Co., Ltd.
Inventor: Zhichong Wang , Haoliang Zheng , Seungwoo Han , Guangliang Shang , Mingfu Han , Lijun Yuan , Xing Yao
Abstract: A shift register circuit, a driving method thereof, a gate drive circuit and a display device are provided. The shift register circuit includes an input sub-circuit, an output sub-circuit, a discharge sub-circuit and a noise reduction sub-circuit. The input sub-circuit is connected to an input signal terminal, a first power source terminal and a pull-down node, and configured to, under the control of an input signal, output a first power source terminal signal to the pull-down node. In the shift register circuit, the discharge sub-circuit may control the potential of the pull-down node to be an ineffective potential at the input stage, thereby preventing the noise reduction sub-circuit from affecting the potentials of the pull-up node and the output terminal under the control of the pull-down node, and ensuring normal output of the shift register circuit.
-
公开(公告)号:US11176909B2
公开(公告)日:2021-11-16
申请号:US16633026
申请日:2019-05-28
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Xing Yao , Mingfu Han , Guangliang Shang , Hao Zhu , Yifang Chu , Yunsik Im
Abstract: The present disclosure provides a compensation method, compensation device, and a display device. The compensation method includes: adjusting charging time for multiple areas of the display screen so that the charging time for each area is positively related to a distance from the area to a data voltage input terminal; comparing a first grayscale value before compensation of a sub-pixel in an i-th row and j-th column with a second grayscale value input to a sub-pixel in an (i−1)-th row and j-th column; searching a corresponding grayscale compensation parameter from a grayscale compensation parameter table according to the first grayscale value and the second grayscale value; compensating the first grayscale value by the grayscale compensation parameter to obtain a third grayscale value; and inputting the third grayscale value to the sub-pixel in the i-th row and j-th column for display.
-
公开(公告)号:US11069274B2
公开(公告)日:2021-07-20
申请号:US16497199
申请日:2019-04-12
Applicant: BOE Technology Group Co., Ltd.
Inventor: Zhichong Wang , Seungwoo Han , Guangliang Shang , Haoliang Zheng , Lijun Yuan , Xing Yao , Mingfu Han
Abstract: The embodiments of the present application provide a shift register unit and a method for driving the same, a gate driving circuit, and a display apparatus. Here, the shift register unit includes a first controlling sub-circuit, a first voltage dividing sub-circuit, a charging and discharging sub-circuit, and an outputting sub-circuit. Here, an output signal of the outputting sub-circuit is controlled by the charging and discharging sub-circuit. A first input signal and a second input signal input at a first input signal terminal Forward and a second input signal terminal Backward electrically coupled to the charging and discharging sub-circuit are pulse signals.
-
公开(公告)号:US10964243B2
公开(公告)日:2021-03-30
申请号:US16515880
申请日:2019-07-18
Applicant: BOE Technology Group Co., Ltd.
Inventor: Lijun Yuan , Xing Yao , Guangliang Shang , Haoliang Zheng , Zhenyu Zhang
Abstract: A shift register circuit according to an embodiment of the present disclosure includes an input sub-circuit and N-stage output sub-circuits. The input sub-circuit is configured to transmit an input signal to a pull up node at a first stage. The output sub-circuit at each stage is configured to transmit a clock signal from a clock signal terminal at a same stage to an output signal terminal at the same stage under the control of a pull-up node at the same stage. The output sub-circuit at each stage is further configured to transmit a signal transmitted to an output signal terminal at the same stage to a pull-up node at an immediately subsequent stage under the control of a shift control signal from a shift control signal terminal at the same stage.
-
8.
公开(公告)号:US20190139475A1
公开(公告)日:2019-05-09
申请号:US16126032
申请日:2018-09-10
Applicant: BOE Technology Group Co., Ltd.
Inventor: Zhichong Wang , Haoliang Zheng , Seungwoo Han , Guangliang Shang , Mingfu Han , Lijun Yuan , Xing Yao
Abstract: A shift register circuit, a driving method thereof, a gate drive circuit and a display device are provided. The shift register circuit includes an input sub-circuit, an output sub-circuit, a discharge sub-circuit and a noise reduction sub-circuit. The input sub-circuit is connected to an input signal terminal, a first power source terminal and a pull-down node, and configured to, under the control of an input signal, output a first power source terminal signal to the pull-down node. In the shift register circuit, the discharge sub-circuit may control the potential of the pull-down node to be an ineffective potential at the input stage, thereby preventing the noise reduction sub-circuit from affecting the potentials of the pull-up node and the output terminal under the control of the pull-down node, and ensuring normal output of the shift register circuit.
-
公开(公告)号:US10255985B2
公开(公告)日:2019-04-09
申请号:US15503830
申请日:2016-08-25
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Mingfu Han , Guangliang Shang , Yuanbo Zhang , Yujie Gao , Yan Yan , Yingmeng Miao , Seungwoo Han , Zhihe Jin , Xing Yao , Haoliang Zheng
Abstract: A supplement resetting module for a gate driver circuit, including a pull-up control unit, a pull-down control unit, a clock signal input end, a predetermined level input end, a first control signal input end, a second control signal input end and a signal output end. A control end of the pull-up control unit is connected to the clock signal input end, an output end of the pull-up control unit is connected to the signal output end, a first control end of the pull-down control unit is connected to the first control signal input end, a second control end of the pull-down control unit is connected to the second control signal input end, an input end of the pull-down control unit is connected to the predetermined level input end, and an output end of the pull-down control unit is connected to the signal output end.
-
公开(公告)号:US10210835B2
公开(公告)日:2019-02-19
申请号:US15656419
申请日:2017-07-21
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Mingfu Han , Guangliang Shang , Seungwoo Han , Zhihe Jin , Xing Yao , Haoliang Zheng , Lijun Yuan , Zhichong Wang
Abstract: The present invention discloses a gate driver on array circuit and a driving method thereof, and a display device. The gate driver on array circuit comprises a first gate driver on array sub-circuit and a second gate driver on array sub-circuit; the first gate driver on array sub-circuit is configured to drive in a first working state which is a state in which no defect occurs in the first gate driver on array sub-circuit; the second gate driver on array sub-circuit is configured to drive in a second working state which is a state in which a defect occurs in the first gate driver on array sub-circuit. The present invention improves the yield rate of the gate driver on array circuit.
-
-
-
-
-
-
-
-
-