公开(公告)号：US4498131A

公开(公告)日：1985-02-05

申请号：US266408

申请日：1981-05-22

申请人： Richard G. Bratt ,  Edward S. Gavrin ,  Stephen I. Schleimer ,  John F. Pilat ,  Walter A. Wallach, Jr. ,  Michael S. Richmond ,  Richard A. Belgard ,  David A. Farber ,  John K. Ahlstrom ,  Steven J. Wallach ,  Lawrence H. Katz ,  Douglas M. Wells ,  Craig J. Mundie ,  Gerald F. Clancy ,  David H. Bernstein ,  Thomas M. Jones ,  Brett L. Bachman

发明人： Richard G. Bratt ,  Edward S. Gavrin ,  Stephen I. Schleimer ,  John F. Pilat ,  Walter A. Wallach, Jr. ,  Michael S. Richmond ,  Richard A. Belgard ,  David A. Farber ,  John K. Ahlstrom ,  Steven J. Wallach ,  Lawrence H. Katz ,  Douglas M. Wells ,  Craig J. Mundie ,  Gerald F. Clancy ,  David H. Bernstein ,  Thomas M. Jones ,  Brett L. Bachman

IPC分类号： G01R31/3185 ,  G06F7/00 ,  G06F7/57 ,  G06F9/22 ,  G06F9/26 ,  G06F9/30 ,  G06F9/35 ,  G06F9/46 ,  G06F9/48 ,  G06F11/07 ,  G06F12/08 ,  G06F12/14

CPC分类号： G01R31/318505 ,  G06F11/073 ,  G06F11/0793 ,  G06F12/0875 ,  G06F12/1483 ,  G06F7/00 ,  G06F7/483 ,  G06F9/3013 ,  G06F9/35 ,  G06F9/4843 ,  G06F9/54 ,  G06F7/49905 ,  G06F7/4991 ,  G06F7/49926

摘要： A digital data processing system has a memory organized into objects containing at least operands and instructions. Each object is identified by a unique and permanent identifier code which identifies the data processing system and the object. The system utilizes unique addressing mechanisms the addresses of which have object fields, offset fields and length fields for specifying the location and the total number of bits of an addressed object. The system uses a protection technique to prevent unauthorized access to objects by users who are identified by a subject number which identifies the user, a process of the system for executing the user's procedure, and the type of operation of the system to be performed by the user's procedure. An access control list for each object includes an access control list entry for each subject having access rights to the object and means for confirming that a particular active subject has access rights to a particular object before permitting access to the object.

摘要翻译： 数字数据处理系统具有被组织成至少包含操作数和指令的对象的存储器。 每个对象由识别数据处理系统和对象的唯一且永久的标识符代码来标识。 该系统利用独特的寻址机制，其地址具有用于指定寻址对象的位置和总位数的对象字段，偏移字段和长度字段。 该系统使用保护技术来防止由识别用户的主题号码，用于执行用户过程的系统的处理以及由该用户执行的系统的操作类型由用户标识的用户的未经授权的访问 用户程序。 每个对象的访问控制列表包括具有对对象的访问权限的每个对象的访问控制列表条目，以及用于在允许访问对象之前确认特定活动主体具有对特定对象的访问权限的装置。

公开(公告)号：US4480306A

公开(公告)日：1984-10-30

申请号：US266425

申请日：1981-05-22

申请人： Brett L. Bachman ,  Richard A. Belgard ,  David H. Bernstein ,  Richard G. Bratt ,  Gerald F. Clancy ,  Edward S. Gavrin ,  Thomas M. Jones ,  Lawrence H. Katz ,  Craig J. Mundie ,  John F. Pilat ,  Stephen I. Schleimer ,  Steven J. Wallach ,  Walter A. Wallach, Jr. ,  Douglas M. Wells

发明人： Brett L. Bachman ,  Richard A. Belgard ,  David H. Bernstein ,  Richard G. Bratt ,  Gerald F. Clancy ,  Edward S. Gavrin ,  Thomas M. Jones ,  Lawrence H. Katz ,  Craig J. Mundie ,  John F. Pilat ,  Stephen I. Schleimer ,  Steven J. Wallach ,  Walter A. Wallach, Jr. ,  Douglas M. Wells

IPC分类号： G06F9/26 ,  G06F9/22

CPC分类号： G06F9/26

摘要： A data processing system having a flexible internal structure, protected from and effectively invisible to users, with multilevel control and stack mechanisms and capability of performing multiple, concurrent operations, and providing a flexible, simplified interface to users. The system is internally comprised of a plurality of separate, independent processors, each having a separate microinstruction control and at least one separate, independent port to a central communications and memory node. The communications and memory node is an independent processor having separate, independent microinstruction control and comprised of a plurality of independently operating, microinstruction controlled processors capable of performing multiple, concurrent memory and communications operations. Addressing mechanisms allow permanent, unique identification of information as objects and an extremely large address space accessible and common to all such systems. Addresses are independent of system physical configuration and, as particularly described with reference to the invention herein, identify locations of object information to be accessed by utlizing address formats which comprise an object field, offset field and a length field so that information can be identified to bit granular level and to information type and format. Arithmetic logic unit (ALU) means, also as particularly described with reference to the invention herein, include general register means having three vertically oriented parts for storing such respective fields. Such ALU means further include an ALU microinstruction stack means having at least one microinstruction stack frame for storing the state of execution of a microinstruction. A memory microinstruction stack is provided to store a plurality of microinstruction stack frames so that microinstruction stack frames can be transferred between the ALU and the memory microinstruction stacks. Protection mechanisms provide variable access rights associated with individual bodies of information. User language instructions are transformed into dialect coded, uniform, intermediate level instructions to provide equal facility of execution for all user languages. Operands are referred to by uniform format names which are transformed, by internal mechanisms transparent to users, into addresses.

公开(公告)号：US4498132A

公开(公告)日：1985-02-05

申请号：US266413

申请日：1981-05-22

申请人： John K. Ahlstrom ,  Brett L. Bachman ,  Richard A. Belgard ,  David H. Bernstein ,  Richard G. Bratt ,  Gerald F. Clancy ,  Edward S. Gavrin ,  Ronald H. Gruner ,  Thomas M. Jones ,  Lawrence H. Katz ,  Craig J. Mundie ,  Michael S. Richmond ,  Stephen I. Schleimer ,  Steven J. Wallach ,  Walter A. Wallach, Jr. ,  Douglas M. Wells

发明人： John K. Ahlstrom ,  Brett L. Bachman ,  Richard A. Belgard ,  David H. Bernstein ,  Richard G. Bratt ,  Gerald F. Clancy ,  Edward S. Gavrin ,  Ronald H. Gruner ,  Thomas M. Jones ,  Lawrence H. Katz ,  Craig J. Mundie ,  Michael S. Richmond ,  Stephen I. Schleimer ,  Steven J. Wallach ,  Walter A. Wallach, Jr. ,  Douglas M. Wells

IPC分类号： G01R31/3185 ,  G06F7/00 ,  G06F7/57 ,  G06F9/22 ,  G06F9/26 ,  G06F9/318 ,  G06F9/35 ,  G06F9/46 ,  G06F9/48 ,  G06F11/07 ,  G06F12/08 ,  G06F12/14

CPC分类号： G06F9/54 ,  G01R31/318505 ,  G06F11/073 ,  G06F11/0793 ,  G06F12/0875 ,  G06F12/1483 ,  G06F7/00 ,  G06F7/483 ,  G06F9/223 ,  G06F9/226 ,  G06F9/262 ,  G06F9/268 ,  G06F9/3017 ,  G06F9/35 ,  G06F9/4843 ,  G06F7/49905 ,  G06F7/4991 ,  G06F7/49926

摘要： A digital data processing system has a memory organized into objects containing at least operands and instructions. Each object is identified by a unique and permanent identifier code which identifies the data processing system and the object. The system further uses multilevel microcode techniques for controlling sequences of microinstructions and for controlling the interval operations of the processor. The system uses a protection technique to prevent unauthorized access to objects by users who are identified by a subject number which identifies the user, a process of the system for executing a user's procedure, and the type of operation of the system to be performed by the user's procedure. An access control list for each object includes an access control list entry for each subject having access rights to the object and means for confirming that a particular active subject has access rights to a particular object before permitting access to the object. The system also includes stacks for containing information relating to the current state of execution of the system.

摘要翻译： 数字数据处理系统具有被组织成至少包含操作数和指令的对象的存储器。 每个对象由识别数据处理系统和对象的唯一且永久的标识符代码来标识。 该系统还使用多级微代码技术来控制微指令的序列并且用于控制处理器的间隔操作。 该系统使用保护技术来防止由标识用户的主题号码，用于执行用户过程的系统的处理以及由该用户执行的系统的操作类型由用户标识的用户的未经授权的访问 用户程序。 每个对象的访问控制列表包括具有对对象的访问权限的每个对象的访问控制列表条目，以及用于在允许访问对象之前确认特定活动主体具有对特定对象的访问权限的装置。 系统还包括用于包含与系统的当前执行状态有关的信息的堆栈。

公开(公告)号：US4532586A

公开(公告)日：1985-07-30

申请号：US266401

申请日：1981-05-22

申请人： Richard G. Bratt ,  Stephen I. Schleimer ,  Edward S. Gavrin ,  John F. Pilat ,  Steven J. Wallach ,  Lawrence H. Katz ,  Douglas M. Wells ,  Gerald F. Clancy ,  Craig J. Mundie ,  David H. Bernstein ,  Thomas M. Jones ,  Brett L. Bachman

发明人： Richard G. Bratt ,  Stephen I. Schleimer ,  Edward S. Gavrin ,  John F. Pilat ,  Steven J. Wallach ,  Lawrence H. Katz ,  Douglas M. Wells ,  Gerald F. Clancy ,  Craig J. Mundie ,  David H. Bernstein ,  Thomas M. Jones ,  Brett L. Bachman

IPC分类号： G01R31/3185 ,  G06F7/00 ,  G06F7/57 ,  G06F9/22 ,  G06F9/26 ,  G06F9/35 ,  G06F9/44 ,  G06F9/46 ,  G06F9/48 ,  G06F11/07 ,  G06F12/08 ,  G06F12/10 ,  G06F12/14

CPC分类号： G06F9/4428 ,  G01R31/318505 ,  G06F11/0721 ,  G06F11/073 ,  G06F11/0793 ,  G06F12/0875 ,  G06F12/10 ,  G06F12/1483 ,  G06F7/00 ,  G06F7/483 ,  G06F9/35 ,  G06F9/4843 ,  G06F9/54 ,  G06F7/49905 ,  G06F7/4991 ,  G06F7/49926

摘要： A digital computer system in which data storage is referred to by a descriptor comprising an object number denoting a variable-length block of storage, an offset indicating how far into that block a desired data item begins, and a length field denoting the length of the desired data item. Separate means exist for manipulating each of the three descriptor portions, thus facilitating repetitive operations on related or contiguous operands. Various levels of microcode control are included. Each level of microcode control has its own stack, facilitating interrupts between levels. Stacks are duplicated in "secure stacks" in memory to protect against loss of state data from the stacks.

公开(公告)号：US4493027A

公开(公告)日：1985-01-08

申请号：US266526

申请日：1981-05-22

申请人： Lawrence H. Katz ,  Douglas M. Wells ,  Michael S. Richmond ,  Richard A. Belgard ,  Walter A. Wallach, Jr. ,  David H. Bernstein ,  John K. Ahlstrom ,  John F. Pilat ,  David A. Farber ,  Richard G. Bratt

发明人： Lawrence H. Katz ,  Douglas M. Wells ,  Michael S. Richmond ,  Richard A. Belgard ,  Walter A. Wallach, Jr. ,  David H. Bernstein ,  John K. Ahlstrom ,  John F. Pilat ,  David A. Farber ,  Richard G. Bratt

IPC分类号： G06F9/40 ,  G06F3/00 ,  G06F9/22 ,  G06F9/36 ,  G06F9/46

CPC分类号： G06F9/4425

摘要： A method for executing call and return instructions in a digital computer system operating under control of microcode. The microcode may specify calls to and returns from sequences of microinstructions. A call microinstruction sequence corresponds to the call instruction. The call microcode in turn calls other microinstruction sequences for deriving pointers representing the location of the called procedure and of arguments from operands in the call instruction. As the call microcode obtains each argument pointer, it places the pointer on the stack. After it has obtained all of the argument pointers, it passes the pointer to the called procedure and a pointer to the argument pointers to a general call microinstruction sequence. That microinstruction sequence locates the called procedure, makes a new frame including the argument pointers, and saves the state necessary to resume execution of the call microinstruction sequence itself. It then obtains the state necessary to commence execution of the called procedure and causes execution of that procedure to commence. The microcode corresponding to the return instruction restores both the state necessary to resume execution of the calling procedure and the state necessary to resume execution of the call microinstruction sequence. When it resumes execution, the call microinstruction sequence completes the return operation.

摘要翻译： 一种在微码控制下操作的数字计算机系统中执行呼叫和返回指令的方法。 微代码可以指定对微指令序列的调用和返回。 调用微指令序列对应于调用指令。 调用微代码又调用其他微指令序列来导出表示被调用过程的位置的指针，以及调用指令中操作数的参数。 当调用微代码获取每个参数指针时，它将指针放在堆栈上。 在获取所有参数指针之后，它将指针传递给被调用的过程，并将指针指向一般调用微指令序列。 该微指令序列定位被调用的过程，创建一个包含参数指针的新帧，并保存恢复执行调用微指令序列本身所需的状态。 然后获得开始执行被叫程序所必需的状态，并使该程序的执行开始。 对应于返回指令的微代码恢复恢复执行调用过程所需的状态和继续执行调用微指令序列所需的状态。 当它恢复执行时，调用微指令序列完成返回操作。

公开(公告)号：US4554626A

公开(公告)日：1985-11-19

申请号：US642732

申请日：1984-08-20

申请人： Lawrence H. Katz ,  Douglas M. Wells ,  Richard G. Bratt

发明人： Lawrence H. Katz ,  Douglas M. Wells ,  Richard G. Bratt

IPC分类号： G06F9/46 ,  G06F9/48

CPC分类号： G06F9/4843 ,  G06F9/54

摘要： A digital data processing system using process synchronization techniques which comprise processing await logic for suspending the execution of a program controlled by a process, virtual processor await logic for performing an await operation at the virtual processor level and for temporarily inhibiting the loading of state items for the execution of the program, virtual processor advance logic for performing an advance operation at the virtual processor level to cease the inhibition of the loading of such state items, and process advance logic for causing the processor of the system to resume execution of the suspended program which is under control of the process.

摘要翻译： 一种使用过程同步技术的数字数据处理系统，其包括处理等待用于暂停由进程控制的程序的执行的逻辑，虚拟处理器等待用于在虚拟处理器级执行等待操作的逻辑，并且暂时禁止用于 程序的执行，用于在虚拟处理器级别执行提前操作的虚拟处理器提前逻辑，以停止对这种状态项的加载的禁止，以及处理提前逻辑，以使系统的处理器恢复执行暂停的程序 这是在过程的控制之下。

公开(公告)号：US4633406A

公开(公告)日：1986-12-30

申请号：US642731

申请日：1984-08-20

申请人： Lawrence H. Katz ,  Douglas M. Wells ,  Richard G. Bratt

发明人： Lawrence H. Katz ,  Douglas M. Wells ,  Richard G. Bratt

IPC分类号： A44C5/20 ,  G06F9/44

CPC分类号： A44C5/20

摘要： A data processing system having a flexible internal structure, protected from and effectively invisible to users, with multilevel control and stack mechanism and capability of performing multiple, concurrent operations, and providing a flexible, simplified interface to users. The system is internally comprised of a plurality of separate, independent processors, each having a separate microinstruction control and at least one separate, independent port to a central communications and memory node. The communications and memory node is an independent processor having separate, independent microinstruction control and comprised of a plurality of independently operating, microinstruction controlled processors capable of performing multiple, concurrent memory and communications operations. Addressing mechanisms allow permanent, unique identification of information and an extremely large address space accessible and common to all such systems. Addresses are independent of system physical configuration. Information is identified to bit granular level and to information type and format. Protection mechanisms provide variable access rights associated with individual bodies of information. User language instructions are transformed into dialect coded, uniform, intermediate level instructions to provide equal facility of execution for all user languages. Operands are referred to by uniform format names which are transformed, by internal mechanisms transparent to users, into addresses.

摘要翻译： 具有灵活的内部结构的数据处理系统，具有多层次的控制和堆栈机制以及执行多个并发操作的能力，并为用户提供灵活，简化的界面，保护用户和用户不可见。 该系统内部由多个独立的独立处理器组成，每个独立的处理器具有单独的微指令控制和至少一个独立于中央通信和存储器节点的独立端口。 通信和存储器节点是具有独立且独立的微指令控制的独立处理器，并且包括能够执行多个并发存储器和通信操作的多个独立操作的微指令控制的处理器。 寻址机制允许永久，唯一的信息识别和所有这些系统可访问和共同的极大的地址空间。 地址与系统物理配置无关。 信息被识别为细粒度级别和信息类型和格式。 保护机制提供与个体信息相关联的可变访问权限。 用户语言指令被转换为方言编码的，统一的中间级指令，以便为所有用户语言提供相同的执行功能。 操作数由统一格式名称引用，通过对用户透明的内部机制转换为地址。

公开(公告)号：US4455603A

公开(公告)日：1984-06-19

申请号：US266416

申请日：1981-05-22

申请人： Richard G. Bratt ,  Lawrence H. Katz ,  Douglas M. Wells

发明人： Richard G. Bratt ,  Lawrence H. Katz ,  Douglas M. Wells

IPC分类号： G06F9/44 ,  G06F9/22

CPC分类号： G06F9/4428

摘要： Systems and method for resolving unresolved pointers in digital computer systems. In unresolved pointers, addresses are represented by means of data items from which the addresses may be derived. The unresolved pointer is resolved when the represented address is derived from the data items. One such system includes the unresolved pointers and procedures for resolving the unresolved pointers in the digital computer system's memory and apparatus in the digital computer system's process which operates under control of pointer translation microcode to translate pointers into represented addreses and under control of call-return microcode for invoking procedures from microcode. The pointer translation microcode responds to an unresolved pointer by causing the call-return microcode to invoke the procedures for resolving the unresolved pointer. Using the data items in the unresolved pointer, the procedures derive the represented address and return it to the pointer translation microcode. Another such system includes an associated address table which associates an unresolved pointer with its represented address and associated pointer fault procedures. Here, the pointer translation microcode responds to the unresolved pointer by searching the table for an entry containing the unresolved pointer. If there is such an entry, the pointer translation microcode obtains the represented address from the table. If there is not, the pointer translation microcode causes the call-return microcode to invoke the associated pointer fault procedures, which resolve the unresolved pointer and place the represented address in the associated address table. A third such system combines the first two systems. Details of the systems and methods of resolving unresolved pointers are also disclosed.

摘要翻译： 用于解决数字计算机系统中未解决的指针的系统和方法。 在未解决的指针中，地址通过可以从其导出地址的数据项来表示。 当表示的地址从数据项导出时，未解决的指针被解析。 一个这样的系统包括用于解决数字计算机系统的存储器中的未解决的指针的未解决的指针和过程，以及在指针转换微代码的控制下操作的数字计算机系统的过程中的设备，以将指针转换成所表示的地址并且在调用返回微代码的控制下 用于从微代码调用过程。 指针转换微代码通过使调用返回微代码调用解决未解析指针的过程来响应未解决的指针。 使用未解决的指针中的数据项，程序导出表示的地址并将其返回到指针转换微码。 另一个这样的系统包括相关联的地址表，其将未解决的指针与其表示的地址和相关联的指针故障过程相关联。 这里，指针转换微代码通过在表中搜索包含未解决的指针的条目来响应未解决的指针。 如果有这样的条目，则指针转换微代码从表中获得表示的地址。 如果没有，则指针转换微码导致调用返回微代码调用相关联的指针故障过程，其解决未解决的指针并将所表示的地址放置在相关联的地址表中。 第三个这样的系统结合了前两个系统。 还公开了解决未解决的指针的系统和方法的细节。

公开(公告)号：US4445173A

公开(公告)日：1984-04-24

申请号：US302262

申请日：1981-09-11

申请人： John F. Pilat ,  Douglas M. Wells

发明人： John F. Pilat ,  Douglas M. Wells

IPC分类号： G06F9/40 ,  G06F9/42

CPC分类号： G06F9/4425

摘要： An improved system for saving state during a call operation and restoring state during a return operation in a computer system in which different call and return operations require the saving and restoring of different amounts of state. The components of the system are call instructions whose operation codes specify the amount of state to be saved, frames which contain either basic state saved on every call operation and restored on every return operation or basic state and extended state saved only on certain calls and returns, a frame type item in each frame which specifies whether it contains only basic state or both basic and extended state, a single return instruction, state-saving apparatus which is responsive to the different call instructions, and state-restoring apparatus which is resposive to the single return instruction and to the frame type item. When a call instruction specifies that extended state is to be saved, the state saving apparatus responds thereto by saving both basic and extended state and setting the frame type item to indicate that the frame contains both; when a call instruction indicates that only basic state is to be saved, the state saving apparatus saves only basic state and sets the frame type item accordingly. The state restoration apparatus responds to the return instruction by restoring that state specified by the frame type item.

摘要翻译： 一种用于在呼叫操作期间保存状态和在计算机系统中的返回操作期间的恢复状态的改进的系统，其中不同的呼叫和返回操作需要保存和恢复不同数量的状态。 系统的组件是其操作代码指定要保存的状态量的呼叫指令，包含每个呼叫操作上保存的基本状态的帧，在每个返回操作或基本状态下恢复的帧，以及仅在某些呼叫和返回上保存的扩展状态 指定是否仅包含基本状态或基本状态和扩展状态两者的帧类型项目，单个返回指令，响应于不同的呼叫指示的状态保存装置，以及响应于不同的呼叫指示的状态恢复装置 单个返回指令和帧类型项目。 当呼叫指令指定要保存扩展状态时，状态保存装置通过同时保存基本和扩展状态并设置帧类型项目来指示帧包含两者; 当呼叫指示指示仅保存基本状态时，状态保存装置仅保存基本状态并相应地设置帧类型项目。 状态恢复装置通过恢复由帧类型项目指定的状态来响应返回指令。

公开(公告)号：US4454579A

公开(公告)日：1984-06-12

申请号：US302322

申请日：1981-09-11

申请人： John F. Pilat ,  Douglas M. Wells ,  Eric Hamilton ,  J. Theodore Compton

发明人： John F. Pilat ,  Douglas M. Wells ,  Eric Hamilton ,  J. Theodore Compton

IPC分类号： G06F9/40

CPC分类号： G06F9/4425

摘要： An improved system for performing call and return operations in a computer system in which every call and return operation changes the program counter and the frame pointer but some call and return operations change other state. Included in the state which may change in the computer system of the present invention is addresses used in calculating other addresses, an identifier specifying which instruction set the processor is executing, and protection state which determines what data may be accessed during execution of a procedure. In the system, the state saved and restored in the call and return operations is divided into basic state saved and restored on every call and return and extended state saved and restored on only some calls and returns. The frame associated with an execution accordingly contains either saved basic state or saved basic state and saved extended state. The frame further contains a frame type item in each frame which specifies whether it contains only basic state or both basic and extended state. There are two call instructions and a single return instruction. The system responds to one call instruction, the neighborhood call instruction, by saving and setting only basic state; it responds to the other, the general call instruction, by saving and setting both basic state and extended state, and if necessary, saving and setting protection state. The processor responds to the single return instruction and the frame type specifier by restoring the state specified in the frame type specifier.

摘要翻译： 一种用于在计算机系统中执行呼叫和返回操作的改进的系统，其中每个呼叫和返回操作改变程序计数器和帧指针，但是一些调用和返回操作改变其他状态。 包括在本发明的计算机系统中可能改变的状态是用于计算其他地址的地址，指定处理器正在执行哪个指令集的标识符，以及确定在执行过程期间可以访问哪些数据的保护状态。 在系统中，在调用和返回操作中保存和恢复的状态被分为基本状态，每次调用恢复并恢复，并且仅在一些调用和返回时保存并恢复扩展状态。 与执行相关联的帧相应地包含保存的基本状态或保存的基本状态并保存扩展状态。 该帧还包括每帧中的帧类型项目，其指定它是仅包含基本状态还是包含基本状态和扩展状态。 有两个呼叫指令和单个返回指令。 系统通过仅保存和设置基本状态来响应一个呼叫指令，邻居呼叫指令; 它通过保存和设置基本状态和扩展状态来响应另一个通用呼叫指令，如果需要，保存并设置保护状态。 处理器通过恢复帧类型说明符中指定的状态来响应单个返回指令和帧类型说明符。