Longest prefix match (LPM) algorithm implementation for a network processor
    5.
    发明申请
    Longest prefix match (LPM) algorithm implementation for a network processor 失效
    用于网络处理器的最长前缀匹配(LPM)算法实现

    公开(公告)号:US20050144553A1

    公开(公告)日:2005-06-30

    申请号:US11045634

    申请日:2005-01-28

    IPC分类号: G06F17/30 G06F17/00

    摘要: Novel data structures, methods and apparatus for finding the longest prefix match search when searching tables with variable length patterns or prefixes. To find the exact match or the best matching prefix, patterns have to be compared a bit at a time until the exact or first: match is found. This requires “n” number of comparisons or memory accesses to identify the closest matching pattern. The trees are built in such a way that the matching result is guaranteed to be a best match, whether it is an exact match or a longest prefix match. Using the trail of all the birds and associated prefix lengths enables determination of the correct prefix result from the trail. By construction, the search tree provides the best matching prefix at or after the first compare during walking of the trail or tree.

    摘要翻译: 当搜索具有可变长度模式或前缀的表时,用于查找最长前缀的新型数据结构,方法和装置匹配搜索。 要找到完全匹配或最佳匹配前缀,模式必须一次比较一下,直到找到完全匹配或第一个匹配。 这需要“n”个比较或存储器访问来识别最接近的匹配模式。 树的建立方式使得匹配结果保证是最佳匹配,无论是完全匹配还是最长匹配前缀。 使用所有鸟的踪迹和相关的前缀长度可以确定路线中正确的前缀结果。 通过构建,搜索树在步道或树的步行期间在第一次比较之前或之后提供最佳的匹配前缀。

    Full match (FM) search algorithm implementation for a network processor
    6.
    发明申请
    Full match (FM) search algorithm implementation for a network processor 失效
    网络处理器的完全匹配(FM)搜索算法实现

    公开(公告)号:US20050076010A1

    公开(公告)日:2005-04-07

    申请号:US10650327

    申请日:2003-08-28

    摘要: Novel data structures, methods and apparatus for finding a full match between a search pattern and a pattern stored in a leaf of the search tree. A key is input, a hash function is performed on the key, a direct table (DT) is accessed, and a tree is walked through pattern search control blocks (PSCBS) until reaching a leaf. The search mechanism uses a set of data structures that can be located in a few registers and regular memory, and then used to build a Patricia tree structure that can be manipulated by a relatively simple hardware macro. Both keys and corresponding information needed for retrieval are stored in the Patricia tree structure. The hash function provides an n->n mapping of the bits of the key to the bits of the hash key. The data structure that is used to store the hash key and the related information in the tree is called a leaf. Each leaf corresponds to a single key that matches exactly with the input key. The leaf contains the key as well as additional information. The length of the leaf is programmable, as is the length of the key. The leaf is stored in random access memory and is implemented as a single memory entry. If the key is located in the direct table then it is called a direct leaf.

    摘要翻译: 用于在搜索图案和存储在搜索树的叶中的模式之间找到完全匹配的新型数据结构,方法和装置。 输入密钥,对密钥执行散列函数,访问直接表(DT),并通过模式搜索控制块(PSCBS)走树,直到到达叶。 搜索机制使用一组可以位于几个寄存器和常规内存中的数据结构,然后用于构建可由相对简单的硬件宏操作的Patricia树结构。 检索所需的两个密钥和相应的信息都存储在Patricia树结构中。 散列函数提供密钥的比特到散列密钥的比特的n> n映射。 用于存储散列键和树中相关信息的数据结构称为叶。 每个叶对应于与输入键完全匹配的单个键。 叶包含关键以及其他信息。 叶片的长度是可编程的,密钥的长度也是可编程的。 叶存储在随机存取存储器中,并被实现为单个存储器条目。 如果键位于直接表中,则称为直接叶。

    Retry cancellation mechanism to enhance system performance
    8.
    发明申请
    Retry cancellation mechanism to enhance system performance 审中-公开
    重试取消机制,提升系统性能

    公开(公告)号:US20060253662A1

    公开(公告)日:2006-11-09

    申请号:US11121121

    申请日:2005-05-03

    IPC分类号: G06F13/00 G06F12/00

    CPC分类号: G06F12/0831 G06F12/0813

    摘要: A method, an apparatus, and a computer program are provided for a retry cancellation mechanism to enhance system performance when a cache is missed or during direct memory access in a multi-processor system. In a multi-processor system with a number of independent nodes, the nodes must be able to request data that resides in memory locations on other nodes. The nodes search their memory caches for the requested data and provide a reply. The dedicated node arbitrates these replies and informs the nodes how to proceed. This invention enhances system performance by enabling the transfer of the requested data if an intervention reply is received by the dedicated node, while ignoring any retry replies. An intervention reply signifies that the modified data is within the node's memory cache and therefore, any retries by other nodes can be ignored.

    摘要翻译: 提供了一种用于重试取消机制的方法,装置和计算机程序,以便在多处理器系统中,在高速缓存错过时或在直接存储器访问期间增强系统性能。 在具有多个独立节点的多处理器系统中,节点必须能够请求位于其他节点上的存储器位置的数据。 节点搜索其内存缓存以获取所请求的数据,并提供答复。 专用节点仲裁这些应答,并通知节点如何继续。 本发明通过在忽略任何重试应答的同时,如果专用节点接收到干预应答,则能够传送所请求的数据来增强系统性能。 干预回复表示修改后的数据位于节点的内存缓存内,因此可以忽略其他节点的任何重试。

    Maintaining a cache of blocks from a plurality of data streams
    10.
    发明授权
    Maintaining a cache of blocks from a plurality of data streams 有权
    维护来自多个数据流的块的高速缓存

    公开(公告)号:US08918588B2

    公开(公告)日:2014-12-23

    申请号:US12419523

    申请日:2009-04-07

    IPC分类号: G06F12/02 G06F12/12

    CPC分类号: G06F12/121 G06F12/123

    摘要: Techniques for replacing one or more blocks in a cache, the one or more blocks being associated with a plurality of data streams, are provided. The one or more blocks in the cache are grouped into one or more groups, each corresponding to one of the plurality of data streams. One or more incoming blocks are received. To free space, the one or more blocks of the one or more groups in the cache are invalidated in accordance with at least one of an inactivity of a given data stream corresponding to the one or more groups and a length of the one or more groups. The one or more incoming blocks are stored in the cache. A number of data streams maintained within the cache is maximized.

    摘要翻译: 提供了用于替换高速缓存中的一个或多个块的技术,所述一个或多个块与多个数据流相关联。 高速缓存中的一个或多个块被分组成一个或多个组,每个组对应于多个数据流中的一个。 接收一个或多个传入块。 为了释放空间,根据与一个或多个组对应的给定数据流的不活动和一个或多个组的长度中的至少一个,高速缓存中的一个或多个组中的一个或多个组的一个或多个块无效 。 一个或多个传入块被存储在高速缓存中。 保持在高速缓存内的多个数据流被最大化。