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公开(公告)号:US20060265174A1
公开(公告)日:2006-11-23
申请号:US11132055
申请日:2005-05-18
IPC分类号: G01K1/00
CPC分类号: G01K7/015 , G01K1/026 , H01L23/34 , H01L2924/0002 , H01L2924/00
摘要: A thermal sensing system may comprise a plurality of remote sensors distributed across an integrated circuit (IC). Each of the plurality of remote sensors provides an analog signal that varies as a function of temperature of a respective region of the IC where each respective remote sensor is located. A central system, forming part of the IC, samples the analog signals from the plurality of remote sensors and converts the sampled analog signals to corresponding digital values.
摘要翻译: 热感测系统可以包括分布在集成电路(IC)上的多个远程传感器。 多个远程传感器中的每一个提供模拟信号,该模拟信号作为每个相应远程传感器所在的IC的相应区域的温度的函数而变化。 构成IC的一部分的中央系统对来自多个远程传感器的模拟信号进行采样,并将采样的模拟信号转换成相应的数字值。
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公开(公告)号:US20070229147A1
公开(公告)日:2007-10-04
申请号:US11395475
申请日:2006-03-30
申请人: Bruce Doyle , Manish Kumar , John Wuu , Samuel Naffziger
发明人: Bruce Doyle , Manish Kumar , John Wuu , Samuel Naffziger
IPC分类号: G05F1/10
CPC分类号: G05F1/46
摘要: For one disclosed embodiment, a supply voltage regulator is to control voltage at a first supply node for a circuit. The supply voltage regulator includes one or more first devices to couple the first supply node to a second supply node when the circuit is in a predetermined operational state and includes an error sensor to control the one or more first devices. The supply voltage regulator includes one or more second devices to couple the first supply node to a third supply node when the circuit is in the predetermined operational state. Other embodiments are also disclosed.
摘要翻译: 对于一个公开的实施例,电源电压调节器用于控制电路的第一供电节点处的电压。 电源电压调节器包括一个或多个第一器件,用于当电路处于预定操作状态时将第一电源节点耦合到第二电源节点,并且包括用于控制一个或多个第一器件的误差传感器。 电源稳压器包括一个或多个第二设备,用于当电路处于预定操作状态时将第一供电节点耦合到第三供电节点。 还公开了其他实施例。
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公开(公告)号:US20060091925A1
公开(公告)日:2006-05-04
申请号:US10978328
申请日:2004-11-01
申请人: Jayen Desai , Bruce Doyle
发明人: Jayen Desai , Bruce Doyle
IPC分类号: H03K5/13
CPC分类号: H04L7/033 , H04L7/0025
摘要: Embodiments of an interpolator system and method are disclosed. One embodiment of an interpolator system, among others, includes an interpolator having first and second output terminals providing output signals; a comparator coupled to the first and second output terminals and configured to detect a peak voltage level of the output signals and compare the peak voltage level with a reference voltage level; and an impedance element coupled to the comparator and the first and second output terminals, wherein the comparator is configured to provide a control signal to the impedance element to change the impedance of the impedance element to set a voltage variation of the output signals.
摘要翻译: 公开了一种内插器系统和方法的实施例。 内插器系统的一个实施例包括具有提供输出信号的第一和第二输出端的内插器; 比较器,耦合到第一和第二输出端,并被配置为检测输出信号的峰值电压电平,并将峰值电压电平与参考电压电平进行比较; 以及耦合到所述比较器和所述第一和第二输出端子的阻抗元件,其中所述比较器被配置为向所述阻抗元件提供控制信号以改变所述阻抗元件的阻抗以设置所述输出信号的电压变化。
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公开(公告)号:US20050285634A1
公开(公告)日:2005-12-29
申请号:US11089577
申请日:2004-06-29
申请人: Bruce Doyle , Gregory Ranson
发明人: Bruce Doyle , Gregory Ranson
CPC分类号: G01R19/04
摘要: Systems, methodologies, media and other embodiments associated with peak detectors are described. One exemplary system embodiment includes a voltage peak detector comprising a first detector logic configured to detect a peak voltage of an input signal. The first detector logic has a circuit behavior that produces a leakage current that may alter the peak voltage. The system can also include a second detector logic configured to replicate the circuit behavior of the first detector logic including being configured to produce a replica leakage current that is equivalent to the leakage current. The second detector logic can be operably connected to the first detector logic to cause the replica leakage current to negate the leakage current.
摘要翻译: 描述了与峰值检测器相关联的系统,方法,介质和其它实施例。 一个示例性系统实施例包括电压峰值检测器,其包括被配置为检测输入信号的峰值电压的第一检测器逻辑。 第一检测器逻辑具有产生可能改变峰值电压的漏电流的电路特性。 该系统还可以包括被配置为复制第一检测器逻辑的电路特性的第二检测器逻辑,包括被配置为产生等效于泄漏电流的复制泄漏电流。 第二检测器逻辑可以可操作地连接到第一检测器逻辑,以使复制漏电流消除泄漏电流。
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公开(公告)号:US07135892B2
公开(公告)日:2006-11-14
申请号:US11089577
申请日:2004-06-29
申请人: Bruce Doyle , Gregory L. Ranson
发明人: Bruce Doyle , Gregory L. Ranson
IPC分类号: G01R19/00
CPC分类号: G01R19/04
摘要: Systems, methodologies, media and other embodiments associated with peak detectors are described. One exemplary system embodiment includes a voltage peak detector comprising a first detector logic configured to detect a peak voltage of an input signal. The first detector logic has a circuit behavior that produces a leakage current that may alter the peak voltage. The system can also include a second detector logic configured to replicate the circuit behavior of the first detector logic including being configured to produce a replica leakage current that is equivalent to the leakage current. The second detector logic can be operably connected to the first detector logic to cause the replica leakage current to negate the leakage current.
摘要翻译: 描述了与峰值检测器相关联的系统,方法,介质和其它实施例。 一个示例性系统实施例包括电压峰值检测器,其包括被配置为检测输入信号的峰值电压的第一检测器逻辑。 第一检测器逻辑具有产生可能改变峰值电压的漏电流的电路特性。 该系统还可以包括被配置为复制第一检测器逻辑的电路特性的第二检测器逻辑,包括被配置为产生等效于泄漏电流的复制泄漏电流。 第二检测器逻辑可以可操作地连接到第一检测器逻辑,以使复制漏电流消除泄漏电流。
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6.
公开(公告)号:US5546026A
公开(公告)日:1996-08-13
申请号:US432959
申请日:1995-05-01
申请人: Jyhfong Lin , Bruce Doyle
发明人: Jyhfong Lin , Bruce Doyle
CPC分类号: G11C7/062 , G11C7/065 , G11C7/1051
摘要: A sense amplifier circuit includes a voltage developing stage which receives first and second data inputs, din1 and din2, and generates a differential voltage, in response to feedback signals received from a first and second data outputs, dout1 and dour2, of the sense amplifier circuit, which is indicative of a voltage difference between the first and second data inputs, din1 and din2; a full-swing locking stage which generates and latches, in response to a control signal .PHI..sub.2 ', complementary latched data outputs from the first and second data outputs, dout1 and dout2, generated by the voltage developing stage; and a voltage equalization stage which equalizes, in response to a control signal .PHI..sub.0 ', voltages on data lines respectively connected to the first and second data outputs, dout1 and dout2. In addition, the voltage equalization stage is used to initiate the voltage developing stage. Timing of the control signals, .PHI..sub.0 ' and .PHI..sub.2 ', is such that the control signal .PHI..sub.2 ' is activated after a finite period following the deactivation of the second control signal .PHI..sub.0 '. To minimize power consumption of the sense amplifier circuit, the control signal .PHI..sub.0 ' is deactivated when either the voltage developing or full-swing locking stage is in operation and the voltage equalization stage is not needed.
摘要翻译: 感测放大器电路包括电压显现级,其接收第一和第二数据输入din1和din2,并响应于从读出放大器电路的第一和第二数据输出dout1和dour2接收的反馈信号产生差分电压 ,其表示第一和第二数据输入din1和din2之间的电压差; 响应于控制信号PHI 2'产生和锁存的全摆幅锁定级,由电压显影级产生的第一和第二数据输出dout1和dout2的互补锁存数据输出; 以及电压均衡级,其均衡响应于控制信号PHI 0',分别连接到第一和第二数据输出dout1和dout2的数据线上的电压。 此外,电压均衡阶段用于启动电压显影阶段。 控制信号PHI 0'和PHI 2'的定时使得控制信号PHI 2'在停止第二控制信号PHI 0'之后的有限周期之后被激活。 为了最小化读出放大器电路的功耗,当电压显影或全摆动锁定级正在运行并且不需要电压均衡级时,控制信号PHI 0'被去激活。
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7.
公开(公告)号:US07498858B2
公开(公告)日:2009-03-03
申请号:US10978328
申请日:2004-11-01
申请人: Jayen J. Desai , Bruce Doyle
发明人: Jayen J. Desai , Bruce Doyle
IPC分类号: H03H11/16
CPC分类号: H04L7/033 , H04L7/0025
摘要: Embodiments of an interpolator system and method are disclosed. One embodiment of an interpolator system, among others, includes an interpolator having first and second output terminals providing output signals; a comparator coupled to the first and second output terminals and configured to detect a peak voltage level of the output signals and compare the peak voltage level with a reference voltage level; and an impedance element coupled to the comparator and the first and second output terminals, wherein the comparator is configured to provide a control signal to the impedance element to change the impedance of the impedance element to set a voltage variation of the output signals.
摘要翻译: 公开了一种内插器系统和方法的实施例。 内插器系统的一个实施例包括具有提供输出信号的第一和第二输出端的内插器; 比较器,耦合到第一和第二输出端,并被配置为检测输出信号的峰值电压电平,并将峰值电压电平与参考电压电平进行比较; 以及耦合到所述比较器和所述第一和第二输出端子的阻抗元件,其中所述比较器被配置为向所述阻抗元件提供控制信号以改变所述阻抗元件的阻抗以设置所述输出信号的电压变化。
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