Fiber reinforced nylon composition
    1.
    发明授权
    Fiber reinforced nylon composition 有权
    纤维增强尼龙组合物

    公开(公告)号:US08044139B2

    公开(公告)日:2011-10-25

    申请号:US12824267

    申请日:2010-06-28

    IPC分类号: C08L77/00

    摘要: The present invention relates to a fiber reinforced nylon composition, wherein the composition includes (A) 25 to 75 parts by weight of a polyarylamide resin, (B) 25 to 75 parts by weight of a reinforcing fiber having a cross-sectional aspect ratio of 1.5 or more, and (C) an impact modifier, and the impact modifier is included in an amount of 1 to 10 parts by weight based on 100 parts by weight of a mixture of the polyarylamide resin and the reinforced fiber. According to the present invention, the fiber reinforced nylonresin composition may exhibit minimal or no warpage, can have excellent fluidity and impact resistance, and can provide high whiteness and a glossy-coating due to minimal or no surface change after dipping in boiling water.

    摘要翻译: 本发明涉及一种纤维增强尼龙组合物,其中组合物包含(A)25至75重量份的聚芳酰胺树脂,(B)25至75重量份的横截面纵横比为 1.5以上,和(C)抗冲改性剂,抗冲改性剂的含量相对于100重量份聚芳酰胺树脂和增强纤维的混合物为1〜10重量份。 根据本发明,纤维增强尼龙树脂组合物可以表现出最小的或没有翘曲,可以具有优异的流动性和抗冲击性,并且可以在浸入沸水中由于最小或没有表面变化而提供高白度和光泽涂层。

    Semiconductor device having a plurality of stacked transistors and method of fabricating the same
    2.
    发明申请
    Semiconductor device having a plurality of stacked transistors and method of fabricating the same 有权
    具有多个堆叠晶体管的半导体器件及其制造方法

    公开(公告)号:US20090020817A1

    公开(公告)日:2009-01-22

    申请号:US12219278

    申请日:2008-07-18

    IPC分类号: H01L27/092 H01L21/8238

    摘要: A semiconductor device according to example embodiments may have a plurality of stacked transistors. The semiconductor device may have a lower insulating layer formed on a semiconductor substrate and an upper channel body pattern formed on the lower insulating layer. A source region and a drain region may be formed within the upper channel body pattern, and a non-metal transfer gate electrode may be disposed on the upper channel body pattern between the source and drain regions. The non-metal transfer gate electrode, the upper channel body pattern, and the lower insulating layer may be covered by an intermediate insulating layer. A metal word line may be disposed within the intermediate insulating layer to contact at least an upper surface of the non-metal transfer gate electrode. An insulating spacer may be disposed on a sidewall of the metal word line. A metal node plug may be disposed within the intermediate insulating layer and the lower insulating layer to contact the source region of the upper channel body pattern. Example embodiments also relate to a method of fabricating the above semiconductor device.

    摘要翻译: 根据示例性实施例的半导体器件可以具有多个堆叠的晶体管。 半导体器件可以具有形成在半导体衬底上的下绝缘层和形成在下绝缘层上的上沟道体图案。 源极区域和漏极区域可以形成在上部通道主体图案内,并且非金属转移栅极电极可以设置在源极和漏极区域之间的上部通道主体图案上。 非金属转移栅电极,上通道体图案和下绝缘层可以被中间绝缘层覆盖。 金属字线可以设置在中间绝缘层内以接触非金属转移栅电极的至少上表面。 绝缘间隔物可以设置在金属字线的侧壁上。 金属节点插头可以设置在中间绝缘层和下绝缘层内以接触上通道主体图案的源区域。 示例性实施例还涉及制造上述半导体器件的方法。

    EMI/RFI shielding resin composite material and molded product made using the same
    3.
    发明授权
    EMI/RFI shielding resin composite material and molded product made using the same 有权
    EMI / RFI屏蔽树脂复合材料和使用其制成的模制产品

    公开(公告)号:US08221654B2

    公开(公告)日:2012-07-17

    申请号:US12634768

    申请日:2009-12-10

    IPC分类号: H01B1/22 G21F1/02

    CPC分类号: H05K9/0083

    摘要: Disclosed is an electromagnetic wave interference (EMI)/radio frequency interference (RFI) shielding resin composite material including (A) a thermoplastic polymer resin, (B) a tetrapod whisker, and (C) a low melting point metal.

    摘要翻译: 公开了一种电磁波干扰(EMI)/射频干扰(RFI)屏蔽树脂复合材料,其包括(A)热塑性聚合物树脂,(B)四脚架晶须和(C)低熔点金属。

    Semiconductor device having a plurality of stacked transistors and method of fabricating the same
    4.
    发明授权
    Semiconductor device having a plurality of stacked transistors and method of fabricating the same 有权
    具有多个堆叠晶体管的半导体器件及其制造方法

    公开(公告)号:US07825472B2

    公开(公告)日:2010-11-02

    申请号:US12219278

    申请日:2008-07-18

    IPC分类号: H01L27/12

    摘要: A semiconductor device according to example embodiments may have a plurality of stacked transistors. The semiconductor device may have a lower insulating layer formed on a semiconductor substrate and an upper channel body pattern formed on the lower insulating layer. A source region and a drain region may be formed within the upper channel body pattern, and a non-metal transfer gate electrode may be disposed on the upper channel body pattern between the source and drain regions. The non-metal transfer gate electrode, the upper channel body pattern, and the lower insulating layer may be covered by an intermediate insulating layer. A metal word line may be disposed within the intermediate insulating layer to contact at least an upper surface of the non-metal transfer gate electrode. An insulating spacer may be disposed on a sidewall of the metal word line. A metal node plug may be disposed within the intermediate insulating layer and the lower insulating layer to contact the source region of the upper channel body pattern. Example embodiments also relate to a method of fabricating the above semiconductor device.

    摘要翻译: 根据示例性实施例的半导体器件可以具有多个堆叠的晶体管。 半导体器件可以具有形成在半导体衬底上的下绝缘层和形成在下绝缘层上的上沟道体图案。 源极区域和漏极区域可以形成在上部通道主体图案内,并且非金属转移栅极电极可以设置在源极和漏极区域之间的上部通道主体图案上。 非金属转移栅电极,上通道体图案和下绝缘层可以被中间绝缘层覆盖。 金属字线可以设置在中间绝缘层内以接触非金属转移栅电极的至少上表面。 绝缘间隔物可以设置在金属字线的侧壁上。 金属节点插头可以设置在中间绝缘层和下绝缘层内以接触上通道主体图案的源区域。 示例性实施例还涉及制造上述半导体器件的方法。

    Method of Preparing Metal Carbide and Metal Carbide Prepared Using the Same
    5.
    发明申请
    Method of Preparing Metal Carbide and Metal Carbide Prepared Using the Same 审中-公开
    制备金属硬质合金和金属硬质合金的方法

    公开(公告)号:US20100158787A1

    公开(公告)日:2010-06-24

    申请号:US12637888

    申请日:2009-12-15

    IPC分类号: C01B31/30 B05D7/00 B65B3/04

    摘要: Disclosed is a method of preparing metal carbide including: applying physical force to a mixture of metal or metal oxide with carbonaceous material to provide a hybrid particle in which the carbonaceous material is filled inside the metal or metal oxide, or the carbonaceous material is coated onto the surface of the metal or metal oxide or the metal or metal oxide is filled inside the carbonaceous material, or the metal or metal oxide is coated onto the surface of the carbonaceous material and heating the hybrid particle; and a metal carbide prepared therefrom.

    摘要翻译: 公开了一种制备金属碳化物的方法,包括:将物理力施加到金属或金属氧化物与碳质材料的混合物上,以提供其中将碳质材料填充在金属或金属氧化物内的混合颗粒,或将碳质材料涂覆到 将金属或金属氧化物或金属或金属氧化物的表面填充在碳质材料的内部,或者将金属或金属氧化物涂布在碳质材料的表面上并加热混合颗粒; 和由其制备的金属碳化物。

    Semiconductor device having a plurality of stacked transistors and method of fabricating the same
    10.
    发明授权
    Semiconductor device having a plurality of stacked transistors and method of fabricating the same 有权
    具有多个堆叠晶体管的半导体器件及其制造方法

    公开(公告)号:US07927932B2

    公开(公告)日:2011-04-19

    申请号:US12923471

    申请日:2010-09-23

    IPC分类号: H01L21/84

    摘要: A semiconductor device according to example embodiments may have a plurality of stacked transistors. The semiconductor device may have a lower insulating layer formed on a semiconductor substrate and an upper channel body pattern formed on the lower insulating layer. A source region and a drain region may be formed within the upper channel body pattern, and a non-metal transfer gate electrode may be disposed on the upper channel body pattern between the source and drain regions. The non-metal transfer gate electrode, the upper channel body pattern, and the lower insulating layer may be covered by an intermediate insulating layer. A metal word line may be disposed within the intermediate insulating layer to contact at least an upper surface of the non-metal transfer gate electrode. An insulating spacer may be disposed on a sidewall of the metal word line. A metal node plug may be disposed within the intermediate insulating layer and the lower insulating layer to contact the source region of the upper channel body pattern. Example embodiments also relate to a method of fabricating the above semiconductor device.

    摘要翻译: 根据示例性实施例的半导体器件可以具有多个堆叠的晶体管。 半导体器件可以具有形成在半导体衬底上的下绝缘层和形成在下绝缘层上的上沟道体图案。 源极区域和漏极区域可以形成在上部通道主体图案内,并且非金属转移栅极电极可以设置在源极和漏极区域之间的上部通道主体图案上。 非金属转移栅电极,上通道体图案和下绝缘层可以被中间绝缘层覆盖。 金属字线可以设置在中间绝缘层内以接触非金属转移栅电极的至少上表面。 绝缘间隔物可以设置在金属字线的侧壁上。 金属节点插头可以设置在中间绝缘层和下绝缘层内以接触上通道主体图案的源区域。 示例性实施例还涉及制造上述半导体器件的方法。