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    Method and apparatus for assigning a memory to multi-processing unit
    1.
    发明授权
    Method and apparatus for assigning a memory to multi-processing unit 有权
    将存储器分配给多处理单元的方法和装置

    公开(公告)号：US08661207B2

    公开(公告)日：2014-02-25

    申请号：US12546303

    申请日：2009-08-24

    申请人： Bup Joong Kim ,  Hak Suh Kim ,  Woo Young Choi ,  Byung Jun Ahn

    发明人： Bup Joong Kim ,  Hak Suh Kim ,  Woo Young Choi ,  Byung Jun Ahn

    IPC分类号： G06F13/00 ,  G06F13/28 ,  G06F9/26 ,  G06F9/34

    CPC分类号： G06F12/02 ,  G06F9/4403

    摘要： A memory mapping apparatus for a multi-processing unit includes at least one memory matching unit configured to perform matching between a plurality of processing units and a plurality of memories, a memory controller configured to perform access control and arbitration for the respective memories, a memory mapping unit configured to include a window map for the respective processing units, make correspond the memories to the respective processing units with reference to the window map, and assign part of the entire address region of the corresponding memory, and a window map change unit configured to change a window map for a processing unit in which a request to use the memory has occurred in response to a request to use the memory from any one of the processing units.

    摘要翻译： 一种用于多处理单元的存储器映射装置，包括：至少一个存储器匹配单元，被配置为执行多个处理单元与多个存储器之间的匹配;存储器控制器，被配置为对各个存储器执行访问控制和仲裁;存储器 配置为包括各个处理单元的窗口映射的映射单元，使参考窗口映射将存储器对应到各个处理单元，并且分配相应存储器的整个地址区域的一部分，以及配置的窗口映射改变单元 响应于来自任何一个处理单元的使用存储器的请求，改变其中已经发生使用存储器的请求的处理单元的窗口图。

    METHOD AND APPARATUS FOR ASSIGNING A MEMORY TO MULTI-PROCESSING UNIT
    2.
    发明申请
    METHOD AND APPARATUS FOR ASSIGNING A MEMORY TO MULTI-PROCESSING UNIT 有权
    用于分配多处理单元的存储器的方法和装置

    公开(公告)号：US20100077193A1

    公开(公告)日：2010-03-25

    申请号：US12546303

    申请日：2009-08-24

    申请人： Bup Joong Kim ,  Hak Suh Kim ,  Woo Young Choi ,  Byung Jun Ahn

    发明人： Bup Joong Kim ,  Hak Suh Kim ,  Woo Young Choi ,  Byung Jun Ahn

    IPC分类号： G06F12/02 ,  G06F9/00

    CPC分类号： G06F12/02 ,  G06F9/4403

    摘要： A memory mapping apparatus for a multi-processing unit includes at least one memory matching unit configured to perform matching between a plurality of processing units and a plurality of memories, a memory controller configured to perform access control and arbitration for the respective memories, a memory mapping unit configured to include a window map for the respective processing units, make correspond the memories to the respective processing units with reference to the window map, and assign part of the entire address region of the corresponding memory, and a window map change unit configured to change a window map for a processing unit in which a request to use the memory has occurred in response to a request to use the memory from any one of the processing units.

    摘要翻译： 一种用于多处理单元的存储器映射装置，包括：至少一个存储器匹配单元，被配置为执行多个处理单元与多个存储器之间的匹配;存储器控制器，被配置为对各个存储器执行访问控制和仲裁;存储器 配置为包括各个处理单元的窗口映射的映射单元，使参考窗口映射将存储器对应到各个处理单元，并且分配相应存储器的整个地址区域的一部分，以及配置的窗口映射改变单元 响应于来自任何一个处理单元的使用存储器的请求，改变其中已经发生使用存储器的请求的处理单元的窗口图。

    Method and apparatus for processing packet in high speed router
    3.
    发明授权
    Method and apparatus for processing packet in high speed router 失效
    高速路由器处理数据包的方法和装置

    公开(公告)号：US07729362B2

    公开(公告)日：2010-06-01

    申请号：US11634730

    申请日：2006-12-06

    申请人： Kook Jin Nam ,  Hak Suh Kim ,  Jae Young Kim ,  Chul Hyung Zhung ,  Bup Joong Kim ,  Byung Jun Ahn

    发明人： Kook Jin Nam ,  Hak Suh Kim ,  Jae Young Kim ,  Chul Hyung Zhung ,  Bup Joong Kim ,  Byung Jun Ahn

    IPC分类号： H04L12/28

    CPC分类号： H04L45/00 ,  H04L45/52 ,  H04L45/54 ,  H04L45/60 ,  H04L45/745 ,  H04L49/3009

    摘要： An apparatus for processing packets in a high speed router and a method thereof are provided. The high speed router includes a forward processor and a control processor where the forward processor having an input terminal processor and an output terminal processor. The output terminal processor manages a Layer 2 Address Table by dividing the Layer 2 Address Table into a layer 2 indirect address table and a layer 2 direct address table and by managing them. The indirect address table is directly indexed in the Next-hop Table of the input terminal processor table. The direct address table is composed of a hashing table for a destination IP address. Therefore, the system efficiency can be improved by reducing the memory which is used for storing the forwarding information table occupied by the forward processor and by reducing the IPC message between the control processor and the forwarding process.

    摘要翻译： 提供了一种用于处理高速路由器中的分组的装置及其方法。 高速路由器包括前向处理器和控制处理器，其中前向处理器具有输入端处理器和输出端处理器。 输出终端处理器通过将第2层地址表划分为第2层间接地址表和第2层直接地址表并对其进行管理来管理二层地址表。 间接地址表直接索引在输入终端处理器表的下一跳表中。 直接地址表由目的IP地址的散列表组成。 因此，可以通过减少用于存储前向处理器所占用的转发信息表的存储器以及通过减少控制处理器与转发过程之间的IPC消息来提高系统效率。

    Memory with flexible serial interfaces and method for accessing memory thereof
    5.
    发明授权
    Memory with flexible serial interfaces and method for accessing memory thereof 有权
    具有灵活串行接口的存储器和用于访问其存储器的方法

    公开(公告)号：US07649795B2

    公开(公告)日：2010-01-19

    申请号：US11524235

    申请日：2006-09-19

    申请人： Bup Joong Kim ,  Yong Wook Ra ,  Woo Young Choi ,  Byung Jun Ahn

    发明人： Bup Joong Kim ,  Yong Wook Ra ,  Woo Young Choi ,  Byung Jun Ahn

    IPC分类号： G11C7/00

    CPC分类号： G06F13/4243 ,  G11C7/10

    摘要： A memory system with a flexible serial interface and a memory accessing method thereof are provided. The memory system includes at least one of memories and a memory controller. The memory controller flexibly sets up serial link connection with each of the memories through serial ports regardless of a physical location and an order of the serial ports. The memory controller also transmits and receives memory data in a serial mode through the serial link connection.

    摘要翻译： 提供了一种具有灵活串行接口及其存储器访问方法的存储器系统。 存储器系统包括存储器和存储器控制器中的至少一个。 存储器控制器通过串行端口灵活地设置与每个存储器的串行链路连接，而不管物理位置和串行端口的顺序如何。 存储器控制器还通过串行链路连接以串行模式发送和接收存储器数据。

    Memory switching control apparatus using open serial interface, operating method thereof, and data storage device therefor
    6.
    发明申请
    Memory switching control apparatus using open serial interface, operating method thereof, and data storage device therefor 有权
    使用开放串行接口的存储器切换控制装置及其操作方法及其数据存储装置

    公开(公告)号：US20090083457A1

    公开(公告)日：2009-03-26

    申请号：US12150953

    申请日：2008-05-01

    申请人： Bup Joong Kim ,  Woo Young Choi ,  Kook Jin Nam ,  Byung Jun Ahn

    发明人： Bup Joong Kim ,  Woo Young Choi ,  Kook Jin Nam ,  Byung Jun Ahn

    IPC分类号： G06F13/14 ,  G06F13/00 ,  G06F12/00 ,  G06F1/12 ,  G06F12/02

    CPC分类号： G06F12/0646 ,  G06F13/1657

    摘要： Provided is a memory switching control apparatus using an open serial interfacing scheme capable of enhancing flexibility, reliability, availability, performance in a data communication processes between a memory and a processing unit and an operating method thereof. The memory switching control apparatus includes: one or more processor interfacing units which perform interfacing with one or more processing units; one or more memory interfacing units which have open-serial-interfacing-scheme memory interfacing ports to interface with data storage devices connected to the memory interfacing ports in a serial interfacing scheme; and a plurality of arbitrating units which are provided corresponding to the memory interfacing units to independently arbitrate usage rights of the processor interfacing units to the memory interfacing units.

    摘要翻译： 提供一种使用能够提高存储器和处理单元之间的数据通信处理中的灵活性，可靠性，可用性，性能的开放串行接口方案的存储器切换控制装置及其操作方法。 存储器切换控制装置包括：一个或多个处理器接口单元，其执行与一个或多个处理单元的接口; 一个或多个存储器接口单元，其具有开放串行接口方案的存储器接口端口以与串行接口方案中连接到存储器接口端口的数据存储设备接口; 以及对应于存储器接口单元设置的多个仲裁单元，以独立地将处理器接口单元的使用权限置于存储器接口单元。

    Packet-optical integrated switch without optical transponder
    7.
    发明授权
    Packet-optical integrated switch without optical transponder 有权
    分组光集成开关，无光发送应答器

    公开(公告)号：US08351784B2

    公开(公告)日：2013-01-08

    申请号：US12628983

    申请日：2009-12-01

    申请人： Hong Ju Kim ,  Hyun Woo Cho ,  Ji Wook Youn ,  Hyun Jae Lee ,  Bup Joong Kim ,  Sun Me Kim ,  Byung Jun Ahn

    发明人： Hong Ju Kim ,  Hyun Woo Cho ,  Ji Wook Youn ,  Hyun Jae Lee ,  Bup Joong Kim ,  Sun Me Kim ,  Byung Jun Ahn

    IPC分类号： H04J14/00

    CPC分类号： H04Q11/0005 ,  H04J14/0212 ,  H04J14/0227 ,  H04J14/0256 ,  H04L49/352 ,  H04L49/357

    摘要： A packet-optical integrated switch without an optical transponder, includes: a packet line card configured to output an Ethernet packet signal to a pre-set output port; a packet switch fabric configured to transfer the packet signal from the packet line card to the output port previously set in a destination address included in the packet signal; a 10 gigabit Ethernet (10 GbE)/optical transport unit level 2 (OTU2) integrated line card configured to convert the packet signal from the packet switch fabric into an OTU2 optical signal having a pre-set wavelength; and a wavelength selection switch fabric configured to allocate the optical signal from the 10 GbE/OTU2 integrated line card to a pre-set wavelength division multiplexing (WDM) port by pre-set wavelength to exchange the optical signal to each port by wavelength, wherein the packet line card, the packet switch fabric, the 10 GbE/OTU2 integrated line card, and the wavelength selection switch fabric perform the reverse operations of the process, respectively.

    摘要翻译： 一种没有光转发器的分组光集成交换机，包括：配置成将以太网分组信号输出到预设输出端口的分组线卡; 分组交换结构，被配置为将分组信号从分组线卡传送到预先设置在分组信号中包括的目的地地址中的输出端口; 配置为将分组交换结构的分组信号转换为具有预设波长的OTU2光信号的10吉比特以太网（10GbE）/光传输单元级2（OTU2）集成线路卡; 以及波长选择交换结构，被配置为通过预定波长将来自10GbE / OTU2集成线路卡的光信号分配给预定波分复用（WDM）端口，以通过波长将光信号交换到每个端口，其中 分组线卡，分组交换结构，10GbE / OTU2集成线路卡和波长选择交换机结构分别执行该过程的反向操作。

    Resource management and recursive path computation for real-time automatic path setup at multi-layer transport network
    8.
    发明授权
    Resource management and recursive path computation for real-time automatic path setup at multi-layer transport network 失效
    资源管理和递归路径计算，用于多层传输网络实时自动路径建立

    公开(公告)号：US08189610B2

    公开(公告)日：2012-05-29

    申请号：US12582333

    申请日：2009-10-20

    申请人： Sun Me Kim ,  Bup Joong Kim ,  Byung Jun Ahn

    发明人： Sun Me Kim ,  Bup Joong Kim ,  Byung Jun Ahn

    IPC分类号： H04J3/16

    CPC分类号： H04L45/12 ,  H04L41/0806 ,  H04L45/02

    摘要： A recursive path computation method is disclosed to integratedly manage resources required for a computation of a data transmission path in a multi-layer transport network to enable automatic real time allocation of lower layer resources required for processing a path request when resources required for a path computation of each layer are not sufficient or when resources have not been previously allocated. A network path request service over multiple layers can be quickly performed, and utilization efficiency of network resources can be maximized.

    摘要翻译： 公开了一种递归路径计算方法，以综合地管理多层传输网络中的数据传输路径计算所需的资源，以便在路径计算所需的资源时能够自动实时分配处理路径请求所需的下层资源 的每层都不够，或者资源尚未分配。 可以快速执行多层网络路径请求服务，最大化网络资源的利用效率。

    PACKET-OPTICAL INTEGRATED SWITCH WITHOUT OPTICAL TRANSPONDER
    9.
    发明申请
    PACKET-OPTICAL INTEGRATED SWITCH WITHOUT OPTICAL TRANSPONDER 有权
    PACKET-OPTICAL INTEGRATED SWITCH无光学传输器

    公开(公告)号：US20100135659A1

    公开(公告)日：2010-06-03

    申请号：US12628983

    申请日：2009-12-01

    申请人： Hong Ju KIM ,  Hyun Woo Cho ,  Ji Wook Youn ,  Hyun Jae Lee ,  Bup Joong Kim ,  Sun Me Kim ,  Byung Jun Ahn

    发明人： Hong Ju KIM ,  Hyun Woo Cho ,  Ji Wook Youn ,  Hyun Jae Lee ,  Bup Joong Kim ,  Sun Me Kim ,  Byung Jun Ahn

    IPC分类号： H04J14/00 ,  H04J14/02 ,  H04L12/56

    CPC分类号： H04Q11/0005 ,  H04J14/0212 ,  H04J14/0227 ,  H04J14/0256 ,  H04L49/352 ,  H04L49/357

    摘要： A packet-optical integrated switch without an optical transponder, includes: a packet line card configured to output an Ethernet packet signal to a pre-set output port; a packet switch fabric configured to transfer the packet signal from the packet line card to the output port previously set in a destination address included in the packet signal; a 10 gigabit Ethernet (10 GbE)/optical transport unit level 2 (OTU2) integrated line card configured to convert the packet signal from the packet switch fabric into an OTU2 optical signal having a pre-set wavelength; and a wavelength selection switch fabric configured to allocate the optical signal from the 10 GbE/OTU2 integrated line card to a pre-set wavelength division multiplexing (WDM) port by pre-set wavelength to exchange the optical signal to each port by wavelength, wherein the packet line card, the packet switch fabric, the 10 GbE/OTU2 integrated line card, and the wavelength selection switch fabric perform the reverse operations of the process, respectively.

    摘要翻译： 一种没有光转发器的分组光集成交换机，包括：配置成将以太网分组信号输出到预设输出端口的分组线卡; 分组交换结构，被配置为将分组信号从分组线卡传送到预先设置在分组信号中包括的目的地地址中的输出端口; 配置为将分组交换结构的分组信号转换为具有预设波长的OTU2光信号的10吉比特以太网（10GbE）/光传输单元级2（OTU2）集成线路卡; 以及波长选择交换结构，被配置为通过预定波长将来自10GbE / OTU2集成线路卡的光信号分配给预定波分复用（WDM）端口，以通过波长将光信号交换到每个端口，其中 分组线卡，分组交换结构，10GbE / OTU2集成线路卡和波长选择交换机结构分别执行该过程的反向操作。