Abstract:
A near field communication (NFC) package in a portable device and method thereof are provided. The NFC package includes a secure storage device configured to store data, and an NFC controller configured to receive data from the secure storage device, provide the received data to a first external terminal by performing an NFC communication in an NFC mode, and provide the received data to a second external terminal by performing a magnetic secure transmission (MST) communication in an MST mode.
Abstract:
A wearable electronic device according to example embodiments includes a display panel configured to display an image, a main board including a processor configured to control an operation of the wearable electronic device, a metal frame defining a perimeter of the wearable electronic device, the metal frame including a metal material, the metal frame having first and second terminals, the first terminal being adjacent to the second terminal with a slit therebetween, a loop antenna between the display panel and the main board, the loop antenna configured to connect to the first and second terminals of the metal frame, and a near field communication (NFC) chip configured to connect to the metal frame and the loop antenna, the NFC chip configured to perform a near field communication by transmitting or receiving an NFC signal using the metal frame and the loop antenna.
Abstract:
A semiconductor integrated circuit including a detector and a secure checker. The detector generates a detection signal upon sensing an abnormal state in an operating environment of the semiconductor integrated circuit. The secure checker generates a check signal to find an operating condition of the detector and receives the detection signal. The detector activates the detection signal in response to the check signal.
Abstract:
A memory card includes: a first memory chip responding to all commands input externally; and a second memory chip responding to commands, among the commands input externally, relevant to reading, programming, and erasing operations with data. Card identification information stored in the first memory chip includes capacity information corresponding to a sum of sizes of the first and second memory chips. The plurality of memory chips of the memory card are useful in designing the memory card with storage capacity in various forms.
Abstract:
A method of operating a non-volatile memory device includes maintaining a write voltage at a predetermined voltage level for programming and/or erasing a memory cell of the non-volatile memory device during a time between execution of consecutive write operations. For example, the write voltage may be activated at the predetermined voltage level responsive to an initial write command, and discharge of the write voltage may be prevented responsive to a signal indicating consecutive write commands. Related devices are also discussed.
Abstract:
A tilt steering apparatus for a vehicle includes a lower steering shaft of which the low end is mounted with a steering gear, an upper steering shaft of which the upper end is mounted with a steering wheel. A universal joint joins a top end of the lower steering shaft with a lower end of the upper steering shaft and a lower column member is fixed to a vehicle body to support the lower steering shaft to be moveable. An upper column member supports the upper steering shaft to be moveable and a tilt lock mechanism that tilt locks the upper column member to the lower column member is provided. The tilt lock mechanism includes a fixed gear attached to the lower column member and a moveable gear attached to the upper column member so as to be moveable. A female gear is provided on the upper column member and a feed screw bar is mounted to the female member to lock the moveable gear to the fixed gear by pressing the moveable gear.
Abstract:
A tilt steering apparatus for a vehicle includes a lower steering shaft of which low end being mounted with a steering gear, an upper steering shaft of which top end being mounted with a steering wheel, a universal joint that joints a top end of the lower steering shaft with a low end of the upper steering shaft, a lower column member fixed to a vehicle body to support the lower steering shaft to be pivotable, an upper column member that supports the upper steering shaft to be pivotable, and a tilt lock mechanism that tilt-locks the upper column member to the lower column member. The top end side of the upper column member is closed.
Abstract:
A steering column having a variable impact-absorbing structure includes an inner column tube, an outer column tube disposed at an outer circumferential part of the inner column tube, a guide fixed to an outer circumferential surface of the outer column tube, a strap having a deformable part fitted into the guide, a pin inserted through the strap and configured to be slidable into the guide, a solenoid that drives the pin, and a control unit that controls the solenoid. The steering column further includes a sensor that senses a state of a driver and outputs the sensing result to the control unit, wherein the strap comprises a plurality of parallel wires, one end of each wire being opened and the other end of each wire being connected to each other in a closed state, and a suspending end that is bent in a loop shape is formed on the closed end to enable the inner column tube to be suspended thereon.
Abstract:
Circuits and methods for optimizing operating performance of an integrated circuit device within a maximum allowed current by varying a period of a clock signal based on an amount of current consumed by the integrated circuit device. In one aspect, an integrated circuit device includes a plurality of functional blocks, a power supply line which supplies an internal power supply voltage to the functional blocks, a voltage converter circuit which controls an amount of current supplied to the power supply line by comparing a reference voltage with the internal power supply voltage, and a clock generator circuit which generates a clock signal that is applied to the functional blocks. The clock generator circuit adjusts a period of the clock signal according to the amount of current supplied to the power supply line.
Abstract:
A memory system includes a memory and a memory controller operating to control the memory. The memory includes a random accessible memory including a memory cell array operable in a random access mode, a NAND flash memory, and a selection circuit making the memory controller operate either one of the random accessible memory or the NAND flash memory.