Abstract:
Provided is an imaging device including a scanning unit configured to control a plurality of pixels so as to perform a shutter scan and a readout scan, and the scanning unit is further configured to switch a drive mode between a first drive mode and a second drive mode having periods of different lengths of the readout scan in control of the plurality of pixels and start the shutter scan performed in the second drive mode before the readout scan performed in the first drive mode ends when switching a drive mode from the first drive mode to the second drive mode.
Abstract:
The photoelectric conversion device includes a pixel unit configured to output first and second signals from columns of first and second regions, and a processing circuit including a first processing circuit including first and third memories, a second processing circuit including second and fourth memories, and a data exchange circuit. The first memory stores the first and second signals output from the first region, and the second memory stores the first and second signals output from the second region. The data exchange circuit stores the first signals read out from the first and second memories in the third memory, and stores the second signals read out from the first and second memories in the fourth memory. The processing circuit outputs the first signals stored in the third memory from the first processing circuit, and outputs the second signals stored in the fourth memory from the second processing circuit.
Abstract:
The photoelectric conversion device includes pixels each including photoelectric converters and a floating diffusion to which charges of the photoelectric converters are transferred, a vertical scanning unit for performing readout processing and reset processing on the pixels while switching the photoelectric converter to be processed and the floating diffusion to be processed, and a control unit that controls the vertical scanning unit. The control unit includes a readout row address generation unit and a reset row address generation unit that generate a row address to be processed. A first cycle in which the photoelectric converter is switched is shorter than a second cycle in which the floating diffusion is switched, an update cycle of the row address is equal to the second cycle, and a setting unit of an update timing of the row address is equal to the length of one cycle of the first cycle.
Abstract:
The photoelectric conversion device includes a pixel unit configured to output first and second signals from columns of first and second regions, and a processing circuit including a first processing circuit including first and third memories, a second processing circuit including second and fourth memories, and a data exchange circuit. The first memory stores the first and second signals output from the first region, and the second memory stores the first and second signals output from the second region. The data exchange circuit stores the first signals read out from the first and second memories in the third memory, and stores the second signals read out from the first and second memories in the fourth memory. The processing circuit outputs the first signals stored in the third memory from the first processing circuit, and outputs the second signals stored in the fourth memory from the second processing circuit.
Abstract:
A photoelectric conversion apparatus includes a pixel array having pixels arranged to form rows and columns and column signal lines configured to output noise signals and optical signals of the pixels, a driver configured to drive the pixels so that the optical signal is output following the noise signal from each pixel, A/D converters configured to perform A/D conversion to convert the noise signals output to the column signal lines into noise data and to subsequently perform A/D conversion to covert the optical signals output to the column signal lines into optical data, a data hold circuit, and a transmitter configured to transmit the noise data converted by the A/D converters to the data hold circuit and to subsequently transmit the optical data converted by the A/D converters to the data hold circuit.
Abstract:
In a photoelectric conversion apparatus, an amplification unit outputs a first amplified signal generated by amplifying a first signal using a first gain, a second amplified signal generated by amplifying the first signal using a second gain, a third amplified signal generated by amplifying a second signal using a third gain, and a fourth amplified signal generated by amplifying the second signal using a fourth gain to an analog to digital (AD) conversion unit in this order. The AD conversion unit generates first to fourth digital signals corresponding to the first to fourth amplified signals, respectively, and outputs the second digital signal and the third digital signal to an output unit prior to the first digital signal and the fourth digital signal.
Abstract:
Periods in which first selection transistors of several pixel cells of a plurality of pixel cells are in an on state are overlapped, and periods in which second selection transistors of several other pixel cells of the plurality of pixel cells are in an on state are overlapped.
Abstract:
An imaging apparatus includes a first holding circuit, a second holding circuit, and a calculator. The first holding circuit is configured to hold and output a logical value based on a logical value supplied from an address decoder. The second holding circuit is configured to hold and output a logical value based on the logical value output from the first holding circuit. The calculator is configured to receive the logical values supplied from the first and second holding circuits and perform a logical operation for generating a driving signal.
Abstract:
Provided is an imaging device including row drive unit having a first storage unit that stores and outputs a first signal for a readout from the pixels on an associated row, a second storage unit that stores and outputs a second signal for an operation for causing the photoelectric conversion element on an associated row to be reset to a charge accumulation state, and a third storage unit that stores and outputs a third signal for maintaining the photoelectric conversion element on an associated row in a charge accumulation state or a reset state based on the first signal output from the first storage unit and the second signal output from the second storage unit.
Abstract:
An A/D converter includes a comparator configured to compare an input voltage and a reference signal changing monotonically with respect to time and output a comparison result signal indicating a comparison result, a pulse signal generation circuit configured to generate a pulse signal in accordance with the comparison result signal, a counting unit configured to receive a first clock signal, and to count the first clock signal from a start of changing a level of the reference signal to when a level of the comparison result signal is changed, and a latch unit configured to latch the pulse signal at a timing which is defined by a plurality of clock signals including a second clock signal in phase with the first clock signal and a third clock signal having a different phase from that of the second clock signal.