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1.发明授权公开(公告)号：US09583587B2
公开(公告)日：2017-02-28
申请号：US14902220
申请日：2014-07-23
发明人： Wanli Wang , Xiaoshe Deng , Genyi Wang , Xuan Huang
IPC分类号： H01L21/33 , H01L21/22 , H01L21/38 , H01L29/66 , H01L29/739 , H01L29/10 , H01L29/06 , H01L21/265 , H01L21/266 , H01L21/225 , H01L21/324
CPC分类号： H01L29/66348 , H01L21/2253 , H01L21/26513 , H01L21/266 , H01L21/324 , H01L29/063 , H01L29/1095 , H01L29/7397
摘要： A method for manufacturing an injection-enhanced insulated-gate bipolar transistor, comprising the following steps: an n-type substrate (12) is provided; a p-type doped layer (14) is formed on the n-type substrate (12); a hard layer (20) is formed on the p-type doped layer (14); a groove (40) extending to the n-type substrate (12) is formed by etching on the p-type doped layer (14); an n-type doped layer (50) is formed on the sidewalls and bottom of the groove (40); the hard layer (20) is removed; p-type impurities of the p-type doped layer (14) and n-type impurities of the n-type doped layer (50) are driven in together, where the p-type impurities are diffused to form a p-type base region (60), and the n-type impurities are diffused to form an n-type buffer layer (70); a gated oxide dielectric layer (80) is formed on the surface of the groove (40); and, a polysilicon layer (90) is deposited in the groove having formed therein the gate oxide dielectric layer (80). In the method for manufacturing the injection-enhanced insulated-gate bipolar transistor, the p-type doped layer (14) and the n-type doped layer (50) are driven in together to form the p-type base region (60) and the n-type buffer layer (70), as only one drive-in process is required, production cycle is shortened in comparison with a conventional method for manufacturing the injection-enhanced insulated-gate bipolar transistor.
摘要翻译： 一种用于制造注射增强绝缘栅双极晶体管的方法，包括以下步骤：提供n型衬底（12）; 在n型衬底（12）上形成p型掺杂层（14）。 在p型掺杂层（14）上形成硬质层（20）。 通过蚀刻在p型掺杂层（14）上形成延伸到n型衬底（12）的沟槽（40）。 在凹槽（40）的侧壁和底部上形成n型掺杂层（50）; 去除硬层（20）; p型掺杂层（14）的p型杂质和n型掺杂层（50）的n型杂质一起被驱动，其中p型杂质被扩散以形成p型基极区域 （60），并且n型杂质扩散以形成n型缓冲层（70）; 在凹槽（40）的表面上形成栅极氧化物介电层（80）; 并且在其中形成有栅极氧化物介电层（80）的沟槽中沉积多晶硅层（90）。 在注入增强型绝缘栅双极晶体管的制造方法中，p型掺杂层（14）和n型掺杂层（50）一起被驱动以形成p型基极区（60）和 n型缓冲层（70）仅需要一个驱动工艺，与用于制造注射增强型绝缘栅双极晶体管的传统方法相比，生产周期缩短。
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公开(公告)号：US09553164B2
公开(公告)日：2017-01-24
申请号：US14902205
申请日：2014-06-13
发明人： Xuan Huang , Wanli Wang , Genyi Wang
IPC分类号： H01L21/00 , H01L29/66 , H01L29/10 , H01L21/304 , H01L21/306 , H01L29/08 , H01L29/49 , H01L23/31 , H01L29/739
CPC分类号： H01L29/66333 , H01L21/304 , H01L21/30604 , H01L21/30625 , H01L23/3171 , H01L29/0804 , H01L29/0834 , H01L29/1004 , H01L29/1095 , H01L29/4916 , H01L29/7395
摘要： A method for manufacturing an IGBT, comprising: providing a substrate having a first surface and a second surface and of a first or second type of electrical conductance; forming grooves at intervals on the first surface of the substrate; filling a semiconductor material of the second or first type of electrical conductance into the grooves to form channels, where the type of electrical conductance of the channels is different from the type of electrical conductance of the substrate; bonding on the first surface of the substrate to form a drift region of the second type of electrical conductance; forming a front-side structure of the IGBT on the basis of the drift region; thinning the substrate starting from the second surface of the substrate until the channels are exposed; and forming a rear-side metal electrode on the channels and the thinned substrate. The method has no specific requirement with respect to sheet flow capacity, nor requires a double-sided exposure machine apparatus, is compatible with a conventional process, and has a simple process and high efficiency.
摘要翻译： 一种制造IGBT的方法，包括：提供具有第一表面和第二表面以及第一或第二类型电导的基板; 在基板的第一表面上间隔地形成槽; 将第二或第一类电导体的半导体材料填充到沟槽中以形成通道，其中通道的导电类型不同于衬底的电导的类型; 在所述衬底的所述第一表面上接合以形成所述第二类型电导的漂移区域; 基于漂移区域形成IGBT的前侧结构; 从衬底的第二表面开始稀释衬底，直到通道暴露; 以及在通道和薄化的基板上形成后侧金属电极。 该方法对于纸张流动能力没有特别要求，也不需要双面曝光机装置，与常规方法兼容，并且具有简单的工艺和高效率。
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公开(公告)号：US20160372570A1
公开(公告)日：2016-12-22
申请号：US14902205
申请日：2014-06-13
发明人： Xuan Huang , Wanli Wang , Genyi Wang
IPC分类号： H01L29/66 , H01L21/304 , H01L29/739 , H01L29/08 , H01L29/49 , H01L23/31 , H01L29/10 , H01L21/306
CPC分类号： H01L29/66333 , H01L21/304 , H01L21/30604 , H01L21/30625 , H01L23/3171 , H01L29/0804 , H01L29/0834 , H01L29/1004 , H01L29/1095 , H01L29/4916 , H01L29/7395
摘要： A method for manufacturing an IGBT, comprising: providing a substrate having a first surface and a second surface and of a first or second type of electrical conductance; forming grooves at intervals on the first surface of the substrate; filling a semiconductor material of the second or first type of electrical conductance into the grooves to form channels, where the type of electrical conductance of the channels is different from the type of electrical conductance of the substrate; bonding on the first surface of the substrate to form a drift region of the second type of electrical conductance; forming a front-side structure of the IGBT on the basis of the drift region; thinning the substrate starting from the second surface of the substrate until the channels are exposed; and forming a rear-side metal electrode on the channels and the thinned substrate. The method has no specific requirement with respect to sheet flow capacity, nor requires a double-sided exposure machine apparatus, is compatible with a conventional process, and has a simple process and high efficiency.
摘要翻译： 一种制造IGBT的方法，包括：提供具有第一表面和第二表面以及第一或第二类型电导的基板; 在基板的第一表面上间隔地形成槽; 将第二或第一类电导体的半导体材料填充到沟槽中以形成通道，其中通道的导电类型不同于衬底的电导的类型; 在所述衬底的所述第一表面上接合以形成所述第二类型电导的漂移区域; 基于漂移区域形成IGBT的前侧结构; 从衬底的第二表面开始稀释衬底，直到通道暴露; 以及在通道和薄化的基板上形成后侧金属电极。 该方法对于纸张流动能力没有特别要求，也不需要双面曝光机装置，与常规方法兼容，并且具有简单的工艺和高效率。
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4.发明申请公开(公告)号：US20160372573A1
公开(公告)日：2016-12-22
申请号：US14902220
申请日：2014-07-23
发明人： Wanli Wang , Xiaoshe Deng , Genyi Wang , Xuan Huang
IPC分类号： H01L29/66 , H01L29/10 , H01L21/324 , H01L21/265 , H01L21/266 , H01L21/225 , H01L29/739 , H01L29/06
CPC分类号： H01L29/66348 , H01L21/2253 , H01L21/26513 , H01L21/266 , H01L21/324 , H01L29/063 , H01L29/1095 , H01L29/7397
摘要： A method for manufacturing an injection-enhanced insulated-gate bipolar transistor, comprising the following steps: an n-type substrate (12) is provided; a p-type doped layer (14) is formed on the n-type substrate (12); a hard layer (20) is formed on the p-type doped layer (14); a groove (40) extending to the n-type substrate (12) is formed by etching on the p-type doped layer (14); an n-type doped layer (50) is formed on the sidewalls and bottom of the groove (40); the hard layer (20) is removed; p-type impurities of the p-type doped layer (14) and n-type impurities of the n-type doped layer (50) are driven in together, where the p-type impurities are diffused to form a p-type base region (60), and the n-type impurities are diffused to form an n-type buffer layer (70); a gated oxide dielectric layer (80) is formed on the surface of the groove (40); and, a polysilicon layer (90) is deposited in the groove having formed therein the gate oxide dielectric layer (80). In the method for manufacturing the injection-enhanced insulated-gate bipolar transistor, the p-type doped layer (14) and the n-type doped layer (50) are driven in together to form the p-type base region (60) and the n-type buffer layer (70), as only one drive-in process is required, production cycle is shortened in comparison with a conventional method for manufacturing the injection-enhanced insulated-gate bipolar transistor.
摘要翻译： 一种用于制造注射增强型绝缘栅双极晶体管的方法，包括以下步骤：提供n型衬底（12）; 在n型衬底（12）上形成p型掺杂层（14）。 在p型掺杂层（14）上形成硬质层（20）。 通过蚀刻在p型掺杂层（14）上形成延伸到n型衬底（12）的凹槽（40）。 在凹槽（40）的侧壁和底部上形成n型掺杂层（50）; 去除硬层（20）; p型掺杂层（14）的p型杂质和n型掺杂层（50）的n型杂质一起被驱动，其中p型杂质被扩散以形成p型基极区域 （60），并且n型杂质扩散以形成n型缓冲层（70）; 在凹槽（40）的表面上形成栅极氧化物介电层（80）; 并且在其中形成有栅极氧化物介电层（80）的沟槽中沉积多晶硅层（90）。 在注入增强型绝缘栅双极晶体管的制造方法中，p型掺杂层（14）和n型掺杂层（50）一起被驱动以形成p型基极区（60）和 n型缓冲层（70）仅需要一个驱动工艺，与用于制造注射增强型绝缘栅双极晶体管的传统方法相比，生产周期缩短。
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