摘要:
A level-shifter circuit may include a pair of inputs which receive a first and a second low-voltage phase signal having a first voltage dynamic with a first maximum value. The level-shifter circuit may also include a pair of outputs which supply a first high-voltage phase signal and a second high-voltage phase signal, level-shifted with respect to the low-voltage signals and having a second voltage dynamic with a second maximum value, higher than the first maximum value. The level-shifter circuit may further include transfer transistors coupled between one of a first reference terminal and a second reference terminal, which are set at one of a first reference voltage and a second reference voltage, and the first output or second output. Protection elements may be coupled to a respective transfer transistor to protect from overvoltages between at least one of the corresponding conduction terminals and control terminals.
摘要:
A charge pump latch circuit is provided that includes at least one first and at least one second charge pump stage interconnected by an intermediate circuit node, and a stabilization stage connected to the intermediate circuit node and to control terminals of transistors of the first and second charge pump stages. The stabilization stage includes at least one first pair and at least one second pair of first and second enable terminals receiving suitable and distinct phase signals that ensure the turn-off of the stabilization stage during overlapping periods of the phase signals. Also provided is a method for using a stabilization stage to drive transistors in first and second charge pump stages that are interconnected by an intermediate circuit node.
摘要:
A charge pump including first and a second charge-pump stages electrically coupled, four pump capacitors connected between two enable terminals and four internal nodes, two pump transistors connected to the pump capacitors and to the internal nodes, and having respective control terminals, two biasing capacitors, connected between the control terminals and the enable terminals, and an equalization circuit connected between the control terminals and structured to limit the voltage between the control terminals within a first range of values.
摘要:
An EEPROM memory having a matrix of individually selectable memory cells, the matrix having a plurality of columns, a plurality of data lines each coupled with the cells of a corresponding column, the data lines being grouped in a plurality of packets, a plurality of biasing elements for providing a biasing signal to the data lines, and means for selecting the biasing elements for a selected one of the packets, wherein each biasing element is associated with corresponding data lines of a plurality of packets, the biasing element comprising switching means for selectively applying the biasing signal to a selected one of the associated data lines.
摘要:
The charge pump circuit has a plurality of cascaded charge pump stages, each provided with a first pump capacitor connected to a first internal node and receiving a first high voltage phase signal, and a second pump capacitor connected to a second internal node and receiving a second high voltage phase signal, complementary with respect to the first. A first transfer transistor is coupled between the first internal node and an intermediate node, and a second transfer transistor is coupled between the second internal node and the intermediate node. The first and second high voltage phase signals have a voltage dynamics higher than a maximum voltage sustainable by the first and second transfer transistors. A protection stage is set between the first internal node and second internal node and respectively, the first transfer transistor and second transfer transistor, for protecting the same transfer transistors from overvoltages.
摘要:
A charge pump system is provided that includes at least one first pump for generating a first working voltage, a second pump for generating a second working voltage, and a third pump for generating a third working voltage. The first pump is connected to an internal supply voltage reference that can having a limited value, and has an output terminal connected to the second and third pumps so as to supplying them with the first working voltage as their supply voltage. A method is also provided for managing the generation of voltages to be used with such a charge pump system.
摘要:
A biasing circuit may include an input configured to receive a supply voltage, a value of which is higher than a limit voltage. The biasing circuit may also include a control stage configured to generate first and second control signals with mutually complementary values, equal alternatively to a first value, in a first half-period of a clock signal, or to a second value, in a second half-period of the clock signal. The first and second values may be a function of the supply and limit voltages. The biasing circuit may also include a biasing stage configured to generate a biasing voltage as a function of the values of the first and second control signals. The first and second control signals may control transfer transistors for transferring the supply voltage to respective outputs, while the biasing voltage may be for controlling protection transistors to reduce overvoltages on the transfer transistors.
摘要:
A sensing circuit (120) for sensing currents, including: a measure circuit branch (132i), having a measure node for receiving an input current (Ic) to be sensed, for converting the input current into a corresponding input voltage (V−); at least one comparison circuit branch (132o), having a comparison node for receiving a comparison current (Igs), for converting the comparison current into a corresponding comparison voltage (V+); and at least one voltage comparator (140) for comparing the input and comparison voltages, and a comparison current generating circuit (N3s, 135; N3s, 135′; N3s, 135″) for generating the comparison current based on a reference current (Ir). The comparison current generating circuit includes at least one voltage generator (135; 135′; 135″). A memory device using the sensing circuit and a method are also provided.
摘要翻译:一种用于感测电流的感测电路(120),包括:测量电路分支(132i),具有用于接收待感测的输入电流(Ic)的测量节点,用于将输入电流转换成对应的输入电压(V- ); 至少一个比较电路分支(132o),具有用于接收比较电流(Igs)的比较节点,用于将比较电流转换成对应的比较电压(V +); 以及用于比较输入和比较电压的至少一个电压比较器(140)和用于产生比较电流的比较电流产生电路(N 3 s,135; N 3 s,135'; N 3 s,135“) 基于参考电流(Ir)。 比较电流产生电路包括至少一个电压发生器(135; 135'; 135“)。 还提供了使用感测电路的存储器件和方法。
摘要:
A voltage converter device includes a voltage regulator having a supply terminal for receiving a supply voltage and an output terminal for providing a regulated voltage. A voltage multiplier is for receiving the regulated voltage and providing a boosted voltage higher in absolute value than the regulated voltage. The voltage multiplier includes circuitry for providing a clock signal that switches periodically between the regulated voltage and a reference voltage, and a sequence of capacitive stages that alternately accumulate and transfer electric charge according to the clock signal for generating the boosted voltage from the regulated voltage. The voltage regulator includes a power transistor and a regulation transistor each having a first conduction terminal, a second conduction terminal and a control terminal.
摘要:
The charge pump circuit has a plurality of cascaded charge pump stages, each provided with a first pump capacitor connected to a first internal node and receiving a first high voltage phase signal, and a second pump capacitor connected to a second internal node and receiving a second high voltage phase signal, complementary with respect to the first. A first transfer transistor is coupled between the first internal node and an intermediate node, and a second transfer transistor is coupled between the second internal node and the intermediate node. The first and second high voltage phase signals have a voltage dynamics higher than a maximum voltage sustainable by the first and second transfer transistors. A protection stage is set between the first internal node and second internal node and respectively, the first transfer transistor and second transfer transistor, for protecting the same transfer transistors from overvoltages.