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公开(公告)号：US06230177B1
公开(公告)日：2001-05-08
申请号：US09096538
申请日：1998-06-12
IPC分类号： G06F1714
CPC分类号： G06F17/142
摘要： The method and apparatus employ a texture filter in a graphics processor to perform a transform such as, for example, a Fast Fourier Transform. The texturizer can include an array of linear interpolators. The architecture reduces the computational complexity of the transform processes.
摘要翻译： 该方法和装置在图形处理器中采用纹理滤波器来执行诸如快速傅里叶变换的变换。 纹理化器可以包括线性内插器阵列。 该架构降低了转换过程的计算复杂度。
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2.发明授权Method and apparatus for providing image and graphics processing using a graphics rendering engine 失效使用图形渲染引擎提供图像和图形处理的方法和装置公开(公告)号：US06333743B1
公开(公告)日：2001-12-25
申请号：US08956537
申请日：1997-10-23
IPC分类号： G06F1516
CPC分类号： G06T1/20 , G06T15/005 , G06T15/04
摘要： A method an system provide that image processing operations and graphics processing are both performed by a graphics rendering system. The texture memory and a texture filter of the graphics rendering system are used to perform look-up table operations as well as multiply and accumulate operations typically associated with image processing.
摘要翻译： 系统提供的图像处理操作和图形处理都由图形渲染系统执行的方法。 纹理存储器和图形渲染系统的纹理过滤器用于执行查找表操作，以及乘法和累加通常与图像处理相关联的操作。
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3.发明授权Method and system for a RISC graphics pipeline optimized for high clock speeds by using recirculation 有权通过使用再循环，为高速时钟速度优化的RISC图形管线的方法和系统公开(公告)号：US06236413B1
公开(公告)日：2001-05-22
申请号：US09134169
申请日：1998-08-14
IPC分类号： G06T120
CPC分类号： G06T1/20
摘要： In a computer system including a processor coupled to a memory via a bus, a system for a reduced instruction set graphics processing subsystem. The graphics processing subsystem is configured to accept graphics data from a computer system via a bus. The graphics processing subsystem is deeply pipelined to achieve high bandwidth, and is operable for processing graphics data including a first and second set of graphics instructions. The graphics instructions from the second set are more complex than the graphics instructions from the first set. The graphics processing subsystem also includes a built-in recirculation path for enabling the execution of graphics instructions by multi-pass. The graphics pipeline is streamlined such that the graphics instructions from the first set are processed efficiently. The graphics instructions from the second set are processed by using multi-pass via the recirculation path. By being optimized for the first set of graphics instructions, the graphics pipeline is able to run at very high clock speeds, thereby increasing its aggregate bandwidth.
摘要翻译： 在包括经由总线耦合到存储器的处理器的计算机系统中，用于精简指令集图形处理子系统的系统。 图形处理子系统被配置为经由总线接收来自计算机系统的图形数据。 图形处理子系统被深入流水线以实现高带宽，并且可操作用于处理包括第一和第二组图形指令的图形数据。 来自第二组的图形指令比来自第一组的图形指令更复杂。 图形处理子系统还包括用于通过多遍执行图形指令的内置再循环路径。 图形管线被简化，使得来自第一组的图形指令被有效地处理。 来自第二组的图形指令通过使用多次循环路径进行处理。 通过针对第一组图形指令进行优化，图形流水线能够以非常高的时钟速度运行，从而增加其总体带宽。
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4.发明授权Apparatus and method for extending computational precision of a computer system having a modular arithmetic processing unit 有权一种用于扩展具有模块运算处理单元的计算机系统的计算精度的装置和方法公开(公告)号：US06256656B1
公开(公告)日：2001-07-03
申请号：US09221911
申请日：1998-12-28
IPC分类号： G06F700
摘要： The integers involved in the computation are embedded into a modular system whose index (i.e., its modulus) is an integer M that is bigger than all of these integers involved. In other words, these integers are treated not as belonging to ordinary integers anymore, but as “modular integers” belonging to the modular system indexed by M. Having completed the embedding, CRT provides the bridge which connects the single modular system indexed by M (ZM) with a collection of k modular systems indexed by m1,m2, . . . , mk respectively (Zm1, Zm2, . . . , Zmk), where M factorizes as m1*m2*m3* . . . *mk, and where each mi is slightly smaller than single precision. Then, after numbers are manipulated within modular arithmetic, the answer is reconstructed via the algorithm of CRT, also known as CRA. Finally, the present invention introduces the process of dinking that overcomes the major weakness of implementing division with modular arithmetic. Particularly, within a composite modular arithmetic system, any theoretically impossible modular division is altered slightly [dinked] to a theoretical possible modular division whose quotient is closed enough to the true quotient sought, thus allowing all four arithmetic operations of modular arithmetic in high precision computation.
摘要翻译： 涉及计算的整数嵌入到一个模块化系统中，它的索引（即它的模数）是一个大于所有这些整数的整数M。 换句话说，这些整数被视为不属于普通的整数，而是属于由M索引的模块化系统的“模块化整数”。完成了嵌入后，CRT提供了连接由M（ ZM），其中包含由m1，m2指定的k个模块化系统的集合。 。 。 ，mk（Zm1，Zm2，...，Zmk），其中M因子分解为m1 * m2 * m3 *。 。 。 * mk，其中每个mi略小于单精度。 然后，在模数运算中操作数字之后，通过CRT的算法（也称为CRA）重构答案。 最后，本发明介绍了采用模块化算法实现划分的主要缺陷的烙印过程。 特别地，在复合模数运算系统中，任何理论上不可能的模块划分被稍微改变为理论上可能的模分割，其商商被关闭到满足所寻求的真商，从而允许在高精度计算中的所有四个算术运算 。
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公开(公告)号：US08199768B1
公开(公告)日：2012-06-12
申请号：US12363172
申请日：2009-01-30
IPC分类号： H04L12/413
CPC分类号： H04W74/0808 , G06Q40/04 , H04W24/00 , H04W28/04 , H04W72/00 , H04W72/0413 , H04W72/042 , H04W72/0453
摘要： Methods, systems, and apparatus, including computer program products, in which access allocations to a spectrum band and transmit rights to the access allocations are defined. Real-time auction bids for the transmit rights to the access allocations to the spectrum band are received, and the transmit rights are awarded to biding devices based on the real-time auction bids.
摘要翻译： 方法，系统和装置，包括计算机程序产品，其中定义了对频带的接入分配和传输对接入分配的权限。 接收对频段接入分配的发送权的实时拍卖，并根据实时拍卖的出价授予发送权。
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6.发明授权LPC filter for removing periodic and quasi-periodic interference from spread spectrum signals 有权LPC滤波器，用于从扩频信号中去除周期性和准周期性干扰公开(公告)号：US07453921B1
公开(公告)日：2008-11-18
申请号：US10015013
申请日：2001-12-11
CPC分类号： H04B1/7101
摘要： A spread spectrum system having data transmitted in a spread spectrum signal. Periodic and quasi-periodic signals which act as interference in the spectrum of interest is effectively filtered out by using a linear predictive coding filter. The LPC filter takes a digitized received spread spectrum signal and generates a set of predictive coefficients and a set of error coefficients. The predictive coefficients represent the interfering periodic and/or quasi-periodic signals. As such, the set of predictive coefficients are discarded. The remaining error coefficients represent what is left over and thereby contains the useful transmitted data found within the spread spectrum signal. The error coefficients are used by the signal processing block to extract the transmitted data.
摘要翻译： 具有在扩频信号中发送的数据的扩频系统。 通过使用线性预测编码滤波器有效地滤除充当感兴趣频谱中的干扰的周期性和准周期性信号。 LPC滤波器采用数字化的接收扩频信号，并产生一组预测系数和一组误差系数。 预测系数表示干扰周期和/或准周期信号。 因此，丢弃该组预测系数。 剩余的误差系数表示剩下的，从而包含在扩频信号中发现的有用的发射数据。 信号处理块使用误差系数来提取发送的数据。
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7.发明授权公开(公告)号：US07142536B1
公开(公告)日：2006-11-28
申请号：US09738010
申请日：2000-12-14
摘要： The present invention provides efficient and effective quality of service for information that is time sensitive (e.g., real time data). An intermediate network communication system and method (e.g., a router) of the present invention performs cut through switching to reduce latency problems for time sensitive information. In one embodiment of the present invention, communication packet header information is encoded with a time sensitive identifier that identifies the information as time sensitive. In one exemplary transfer control protocol/internet protocol TCP/IP implementation of the present invention, time sensitive indication is provided in the link layer information. In one embodiment of the present invention, time sensitive information is dropped if the intermediate network device can not communicate the information within specified timing constraints. In one embodiment of the present invention time sensitive information is cut through routed on a virtual channel and pre-empts non time sensitive information. In one embodiment a communication path probe is cut through routed via intermediate network devices to establish a communication path before other information is communicated from a originating source to a final destination. In one embodiment the present invention leverages previously collected information to establish a communication path. In one embodiment the present invention, an intermediate network device establishes a second communication link if a first communication link is unavailable.
摘要翻译： 本发明为时间敏感的信息（例如，实时数据）提供有效且有效的服务质量。 本发明的中间网络通信系统和方法（例如，路由器）执行切换切换以减少针对时间敏感信息的等待时间问题。 在本发明的一个实施例中，通信分组报头信息用标识该时间敏感信息的时间敏感标识符进行编码。 在本发明的一个示例性传输控制协议/互联网协议TCP / IP实现中，在链路层信息中提供时间敏感指示。 在本发明的一个实施例中，如果中间网络设备不能在指定的时序约束内传送信息，则丢弃时间敏感信息。 在本发明的一个实施例中，通过在虚拟信道上路由来切断时间敏感信息，并且预先消除非时间敏感信息。 在一个实施例中，通过中间网络设备路由通信路径探测器，以在其他信息从始发源传送到最终目的地之前建立通信路径。 在一个实施例中，本发明利用先前收集的信息来建立通信路径。 在本发明的一个实施例中，如果第一通信链路不可用，则中间网络设备建立第二通信链路。
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公开(公告)号：US06233647B1
公开(公告)日：2001-05-15
申请号：US09111346
申请日：1998-07-07
申请人： Ole Bentz , Carroll Philip Gossett , Mark Goudy
发明人： Ole Bentz , Carroll Philip Gossett , Mark Goudy
IPC分类号： G06F1210
CPC分类号： G06F12/0875
摘要： The present invention pertains to an apparatus for and method of mapping texture memory to a texture cache such that cache contention is minimized. Significantly, in one embodiment of the present invention, addresses of the texture memory are mapped to entries of the texture cache according to a predetermined hashing scheme. According to the one embodiment, texture memory is addressed as a virtually contiguous address space by a multi-dimensional index. The multi-dimensional index is further partitioned into a low order bit field and a high order bit field. Low order bits of the multi-dimensional index are directly mapped to low order bits of the cache address. High order bits of the multi-dimensional index are mapped to high order bits of the cache address according to a predetermined address-hashing scheme. Particularly, in one embodiment, high order bits of the multi-dimensional index are selectively “exclusive-or-ed” to generate corresponding addresses of the texture cache.
摘要翻译： 本发明涉及将纹理存储器映射到纹理高速缓存的装置和方法，使得高速缓存争用被最小化。 重要的是，在本发明的一个实施例中，纹理存储器的地址根据预定的散列方案映射到纹理高速缓存的条目。 根据一个实施例，纹理存储器通过多维索引被寻址为虚拟连续的地址空间。 多维索引被进一步划分为低位比特字段和高位比特字段。 多维索引的低位比特直接映射到缓存地址的低位。 根据预定的地址哈希方案，将多维索引的高位比特映射到高速缓存地址的高位。 特别地，在一个实施例中，多维索引的高阶比特被选择性地“排除”以产生纹理高速缓存的相应地址。
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公开(公告)号：US5699079A
公开(公告)日：1997-12-16
申请号：US561584
申请日：1995-11-21
CPC分类号： G06T5/20
摘要： A system and method for restoring bits of pixels prior to display where the original bits of the pixels were truncated compares each pixel to its neighbors to determine the relative value of each pixel as compared to its neighbors. First, the truncated pixel is shifted. That is, the remaining bits of the pixel are shifted to the left and additional bits are added in the least significant bit positions. Next, the pixel is compared to its neighbors to determine their relative values. For each neighbor that is greater than the pixel in question, the truncated shifted pixel is incremented by one. Similarly, for each neighbor that is less than the pixel in question, the truncated shifted pixel is decremented by one. Once the pixel is evaluated relative to its neighboring pixels, determination of the restored pixel is complete. The restored pixel can then be displayed.
摘要翻译： 用于在显示器之前恢复像素的位的系统和方法，其中像素的原始位被截断，将每个像素与其邻居进行比较，以确定与其邻居相比每个像素的相对值。 首先，截断像素移位。 也就是说，像素的剩余位向左移位，并且在最低有效位位置添加附加位。 接下来，将像素与其邻居进行比较以确定其相对值。 对于大于所讨论的像素的每个邻居，截断的移位像素增加1。 类似地，对于小于所讨论的像素的每个邻居，截断的移位像素减1。 一旦相对于其相邻像素进行像素的评估，恢复像素的确定就完成了。 然后可以显示恢复的像素。
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公开(公告)号：US08855040B1
公开(公告)日：2014-10-07
申请号：US12244376
申请日：2008-10-02
CPC分类号： H04B15/00 , H04B1/00 , H04B7/024 , H04B7/0413 , H04B17/00 , H04J11/005 , H04W72/00 , H04W72/08
摘要： Methods, systems, and apparatus, including computer program products, for implementing interference cancellation across base stations. Communications information for transmitting to a receiving device is received from a first base station at a second base station. At the second base station, second communications information is generated for transmission to the receiving device from the second base station. The second communications information comprises data to reduce interference with the first communications information.
摘要翻译： 用于实现基站干扰消除的方法，系统和装置，包括计算机程序产品。 在第二基站从第一基站接收用于发送到接收设备的通信信息。 在第二基站，生成第二通信信息，以从第二基站向接收设备发送。 第二通信信息包括减少对第一通信信息的干扰的数据。
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