公开(公告)号：US20060202706A1

公开(公告)日：2006-09-14

申请号：US11356713

申请日：2006-02-17

申请人： Stefan Gollmer ,  Carsten Ohlhoff ,  Hans-Christoph Ostendorf

发明人： Stefan Gollmer ,  Carsten Ohlhoff ,  Hans-Christoph Ostendorf

IPC分类号： G01R31/02

CPC分类号： G11C29/1201 ,  G01R31/31921 ,  G11C29/40 ,  G11C29/48 ,  G11C2029/5602

摘要： In a method for testing an electric circuit comprising circuit subunits, the electric circuit is connected to a test system via a tester channel with a connection unit. The tester channel is connected to the circuit subunits by means of a connecting unit, test signals are generated for the electric circuit and response signals generated by the electric circuit in response to the test signals are evaluated. The test signals and the response signals are interchanged between the circuit subunits by means of at least one compression/decompression unit associated with at least one of the circuit subunits.

公开(公告)号：US07092303B2

公开(公告)日：2006-08-15

申请号：US10478441

申请日：2002-05-13

申请人： Carsten Ohlhoff

发明人： Carsten Ohlhoff

IPC分类号： G11C29/00

CPC分类号： G11C29/12015 ,  G11C11/401 ,  G11C29/14

摘要： The invention relates to a dynamic memory having a memory cell array, a test controller to test the memory cell array and an oscillator to control the refreshing of the memory cell array. According to the invention, the memory includes a device for using the oscillator as a time base for the test controller, such that a slow time base is achieved which may be used for different self-tests of the memory.

摘要翻译： 本发明涉及具有存储单元阵列的动态存储器，测试存储单元阵列的测试控制器和用于控制存储单元阵列刷新的振荡器。 根据本发明，存储器包括用于使用振荡器作为测试控制器的时基的装置，使得实现可以用于存储器的不同自检的慢时基。

公开(公告)号：US06504394B2

公开(公告)日：2003-01-07

申请号：US09737057

申请日：2000-12-14

申请人： Carsten Ohlhoff

发明人： Carsten Ohlhoff

IPC分类号： G01R3126

CPC分类号： H01L22/22 ,  G11C5/147 ,  H01L22/34

摘要： A circuit configuration for trimming reference voltages in semiconductor chips. The circuit configuration contains a test logic unit and a trimming circuit for trimming at the chip level the reference voltages. The reference voltages are compared to an externally supplied comparison voltage and the reference voltage is varied by the trimming circuit if it does not match the comparison voltage.

摘要翻译： 用于修整半导体芯片中的参考电压的电路配置。 电路配置包含测试逻辑单元和用于在芯片级修整参考电压的微调电路。 将参考电压与外部提供的比较电压进行比较，并且如果与比较电压不匹配，则通过微调电路改变参考电压。

公开(公告)号：US07574643B2

公开(公告)日：2009-08-11

申请号：US11356713

申请日：2006-02-17

申请人： Stefan Gollmer ,  Carsten Ohlhoff ,  Hans-Christoph Ostendorf

发明人： Stefan Gollmer ,  Carsten Ohlhoff ,  Hans-Christoph Ostendorf

IPC分类号： G01R31/28

CPC分类号： G11C29/1201 ,  G01R31/31921 ,  G11C29/40 ,  G11C29/48 ,  G11C2029/5602

摘要： In a method for testing an electric circuit comprising circuit subunits, the electric circuit is connected to a test system via a tester channel with a connection unit. The tester channel is connected to the circuit subunits by means of a connecting unit, test signals are generated for the electric circuit and response signals generated by the electric circuit in response to the test signals are evaluated. The test signals and the response signals are interchanged between the circuit subunits by means of at least one compression/decompression unit associated with at least one of the circuit subunits.

摘要翻译： 在用于测试包括电路子单元的电路的方法中，电路经由具有连接单元的测试器通道连接到测试系统。 测试仪通道通过连接单元连接到电路子单元，产生用于电路的测试信号，并且响应于测试信号对电路产生的响应信号进行评估。 测试信号和响应信号通过与至少一个电路子单元相关联的至少一个压缩/解压缩单元在电路子单元之间互换。

公开(公告)号：US07231562B2

公开(公告)日：2007-06-12

申请号：US10754455

申请日：2004-01-09

申请人： Carsten Ohlhoff ,  Peter Beer

发明人： Carsten Ohlhoff ,  Peter Beer

IPC分类号： G01R31/28

CPC分类号： G11C29/40 ,  G11C2029/0405 ,  G11C2029/1208 ,  G11C2029/2602

摘要： The invention relates to an integrated memory module having a memory unit and a self-test circuit, the self-test circuit being embodied in such a way as to make available test data and test addresses for testing memory areas in the memory unit and to generate defect data depending on the detection of a defect, a test circuit being provided in order to receive defect data from one or a plurality of connectable memory modules to be detected, the test circuit being configured in such a way as to store the received defect data depending on addresses assigned thereto in the memory unit.

摘要翻译： 本发明涉及一种具有存储器单元和自检电路的集成存储器模块，该自检电路以这样一种方式实现：提供用于测试存储器单元中的存储器区域的测试数据和测试地址，并产生 缺陷数据取决于缺陷的检测，提供测试电路以便从要被检测的一个或多个可连接存储器模块接收缺陷数据，该测试电路被配置成存储接收的缺陷数据 取决于在存储器单元中分配给其的地址。

公开(公告)号：US07137049B2

公开(公告)日：2006-11-14

申请号：US10425224

申请日：2003-04-29

申请人： Jochen Hoffmann ,  Carsten Ohlhoff ,  Peter Beer

发明人： Jochen Hoffmann ,  Carsten Ohlhoff ,  Peter Beer

IPC分类号： G11C29/00

CPC分类号： G11C29/24

摘要： Embodiments of the present invention generally provide methods and apparatus for testing memory devices having normal memory elements and redundant memory elements. During a front-end testing procedure, normal memory elements that are found to be defective are replaced by redundant memory elements. During the front-end test, redundant memory elements that are found to be defective may be marked as defective by blowing associated mask fuses. During a back-end testing procedure, the results of testing a normal memory element may be masked (e.g., forced to a passing result) if the normal memory element has been replaced by a redundant memory element. Similarly, the results of testing a redundant memory element may be masked if the redundant memory element was previously found to be defective, as indicated by an associated mark fuse. By masking the test results for memory elements (normal and redundant) that have been previously found defective, the memory elements may be tested in the same manner during front-end and back-end testing.

公开(公告)号：US06891431B2

公开(公告)日：2005-05-10

申请号：US10675761

申请日：2003-09-30

申请人： Peter Beer ,  Carsten Ohlhoff

发明人： Peter Beer ,  Carsten Ohlhoff

IPC分类号： G01R15/20 ,  G01R19/00 ,  H03F15/00 ,  G01R31/26

CPC分类号： G01R15/202 ,  G01R19/0092

摘要： To measure the current consumption of a circuit device with a current measuring device, the circuit device being supplied by a current/voltage supply line device, as simply as possible without the need for additional measuring devices, an integrated circuit configuration includes integrating the circuit configuration, the current measuring device, and, also, the current/voltage supply line device in a common chip and forming the current measuring device with a Hall sensor device.

摘要翻译： 为了测量具有电流测量装置的电路装置的电流消耗，电路装置由电流/电压供应线装置提供，尽可能简单地不需要额外的测量装置，集成电路配置包括集成电路配置 电流测量装置，以及公共芯片中的电流/电压供应线装置，并用霍尔传感器装置形成电流测量装置。

公开(公告)号：US07490274B2

公开(公告)日：2009-02-10

申请号：US11397790

申请日：2006-04-04

申请人： Jochen Hoffmann ,  Carsten Ohlhoff ,  Peter Beer

发明人： Jochen Hoffmann ,  Carsten Ohlhoff ,  Peter Beer

IPC分类号： G11C29/00

CPC分类号： G11C29/24

摘要： Embodiments of the present invention generally provide methods and apparatus for testing memory devices having normal memory elements and redundant memory elements. During a front-end testing procedure, normal memory elements that are found to be defective are replaced by redundant memory elements. During the front-end test, redundant memory elements that are found to be defective may be marked as defective by blowing associated mask fuses. During a back-end testing procedure, the results of testing a normal memory element may be masked (e.g., forced to a passing result) if the normal memory element has been replaced by a redundant memory element. Similarly, the results of testing a redundant memory element may be masked if the redundant memory element was previously found to be defective, as indicated by an associated mark fuse. By masking the test results for memory elements (normal and redundant) that have been previously found defective, the memory elements may be tested in the same manner during front-end and back-end testing.

摘要翻译： 本发明的实施例通常提供用于测试具有正常存储元件和冗余存储器元件的存储器件的方法和装置。 在前端测试过程中，发现有缺陷的正常存储器元件被冗余存储元件代替。 在前端测试期间，发现有缺陷的冗余存储器元件可能通过吹制相关的掩模保险丝而被标记为有缺陷的。 在后端测试过程中，如果普通存储器元件已被冗余存储器元件代替，则测试正常存储器元件的结果可能会被屏蔽（例如，强制转换为传递结果）。 类似地，如果冗余存储器元件先前被发现是有缺陷的，则由冗余存储元件测试的结果可以被掩蔽，如相关标记熔丝所示。 通过掩盖以前发现有缺陷的存储器元件（正常和冗余）的测试结果，可以在前端和后端测试中以相同的方式测试存储器元件。

公开(公告)号：US20080246505A1

公开(公告)日：2008-10-09

申请号：US12098040

申请日：2008-04-04

申请人： Markus Kollwitz ,  Carsten Ohlhoff

发明人： Markus Kollwitz ,  Carsten Ohlhoff

IPC分类号： G01R31/26

CPC分类号： G11C29/56 ,  G11C2029/5602

摘要： A semiconductor device test method and system. One embodiment provides a method for testing semiconductor devices forming a group of semiconductor devices to be tested. For addressing or selection of one of the semiconductor devices of the group, at least two different signals are supplied to the respective semiconductor device to be addressed or selected via at least two different semiconductor device connections.

摘要翻译： 半导体器件测试方法和系统。 一个实施例提供了一种用于测试形成要测试的一组半导体器件的半导体器件的方法。 为了寻址或选择组中的一个半导体器件，至少两个不同的信号被提供给相应的半导体器件，以通过至少两个不同的半导体器件连接进行寻址或选择。

公开(公告)号：US07197678B2

公开(公告)日：2007-03-27

申请号：US10613367

申请日：2003-07-03

申请人： Carsten Ohlhoff ,  Peter Beer

发明人： Carsten Ohlhoff ,  Peter Beer

IPC分类号： G11C29/00 ,  G11C7/00

CPC分类号： G11C29/1201 ,  G11C11/401 ,  G11C29/40

摘要： A test circuit for testing a memory circuit has a data input line for providing test data and a comparator unit. The comparator unit is connected to the data input line and to the memory circuit for comparing the test data written into the memory circuit with the test data read from the memory area. The data input line is connected to the memory circuit via a data change circuit. The data change circuit is controllable depending on a result of a comparison in the comparator unit such that when an error occurs, subsequent test data can be written in an altered manner to the memory circuit.

摘要翻译： 用于测试存储器电路的测试电路具有用于提供测试数据的数据输入线和比较器单元。 比较器单元连接到数据输入线和存储器电路，用于将写入存储器电路的测试数据与从存储区读取的测试数据进行比较。 数据输入线通过数据变换电路连接到存储电路。 根据比较器单元中的比较结果，数据变换电路是可控的，使得当发生错误时，后续测试数据可以以改变的方式写入存储器电路。