公开(公告)号：US20140185649A1

公开(公告)日：2014-07-03

申请号：US14141781

申请日：2013-12-27

Applicant: Cascade Microtech, Inc.

Inventor： Botho Hirschfeld ,  Axel Becker

IPC: G01N25/66

CPC classification number: G01N25/66 ,  G01R31/00 ,  G01R31/2862

Abstract: Disclosed systems and methods for testing a device under test (DUT) with a probe system are selected to test a DUT at a temperature below the dew point of the ambient environment surrounding the probe system. Probe systems include a measurement chamber configured to isolate a cool, dry testing environment and a measurement chamber door configured to selectively isolate the internal volume of the measurement chamber. When a DUT, that is or is included on a substrate, is tested at a low temperature, systems and methods are selected to heat the substrate in a dry environment, at least partially isolated from the measurement chamber, to at least a temperature above the dew point and/or the frost point of the ambient environment.

Abstract translation: 选择用于使用探针系统测试被测设备（DUT）的公开的系统和方法，以在低于探针系统周围环境环境露点的温度下测试DUT。 探测系统包括被配置为隔离冷却干燥测试环境的测量室和被配置为选择性地隔离测量室的内部体积的测量室门。 当在低温下测试被包括在基底上的DUT时，选择系统和方法以将至少部分与测量室隔离的干燥环境中的衬底加热至至少高于 露点和/或周围环境的霜点。

公开(公告)号：US09373533B2

公开(公告)日：2016-06-21

申请号：US14141812

申请日：2013-12-27

Applicant: Cascade Microtech, Inc.

Inventor： Frank Fehrmann ,  Botho Hirschfeld ,  Stojan Kanev

IPC: G01R31/20 ,  H01L21/677

CPC classification number: H01L21/67745 ,  H01L21/67775

Abstract: Systems and methods for providing wafer access in a wafer processing system are disclosed herein. The methods may include docking a first wafer cassette on the wafer processing system and removing a selected wafer from the first wafer cassette with the wafer processing system. The methods further may include performing a process operation on the selected wafer with the wafer processing system and undocking the first wafer cassette from the wafer processing system while performing the process operation. The methods also may include docking a second wafer cassette (which may be the same as or different from the first wafer cassette) on the wafer processing system, inventorying the second wafer cassette with the wafer processing system, and/or subsequently placing the selected wafer in the second wafer cassette. The systems may include wafer processing systems that include a controller that is programmed to perform at least a portion of the methods.

Abstract translation: 本文公开了在晶片处理系统中提供晶片访问的系统和方法。 所述方法可以包括将晶片处理系统上的第一晶片盒对接，并且利用晶片处理系统从第一晶片盒移除选定的晶片。 该方法还可以包括使用晶片处理系统在所选择的晶片上执行处理操作，并且在执行处理操作时从晶片处理系统脱离第一晶片盒。 所述方法还可以包括将第二晶片盒（其可以与第一晶片盒相同或不同）对准在晶片处理系统上，利用晶片处理系统盘存第二晶片盒，和/或随后将所选择的晶片 在第二晶片盒中。 系统可以包括晶片处理系统，其包括被编程为执行方法的至少一部分的控制器。

公开(公告)号：US20140186145A1

公开(公告)日：2014-07-03

申请号：US14141812

申请日：2013-12-27

Applicant: Cascade Microtech, Inc.

Inventor： Frank Fehrmann ,  Botho Hirschfeld ,  Stojan Kanev

IPC: H01L21/67

CPC classification number: H01L21/67745 ,  H01L21/67775

Abstract: Systems and methods for providing wafer access in a wafer processing system are disclosed herein. The methods may include docking a first wafer cassette on the wafer processing system and removing a selected wafer from the first wafer cassette with the wafer processing system. The methods further may include performing a process operation on the selected wafer with the wafer processing system and undocking the first wafer cassette from the wafer processing system while performing the process operation. The methods also may include docking a second wafer cassette (which may be the same as or different from the first wafer cassette) on the wafer processing system, inventorying the second wafer cassette with the wafer processing system, and/or subsequently placing the selected wafer in the second wafer cassette. The systems may include wafer processing systems that include a controller that is programmed to perform at least a portion of the methods.

Abstract translation: 本文公开了在晶片处理系统中提供晶片访问的系统和方法。 所述方法可以包括将晶片处理系统上的第一晶片盒对接，并且利用晶片处理系统从第一晶片盒移除选定的晶片。 该方法还可以包括使用晶片处理系统在所选择的晶片上执行处理操作，并且在执行处理操作时从晶片处理系统脱离第一晶片盒。 所述方法还可以包括将第二晶片盒（其可以与第一晶片盒相同或不同）对准在晶片处理系统上，利用晶片处理系统盘存第二晶片盒，和/或随后将所选择的晶片 在第二晶片盒中。 系统可以包括晶片处理系统，其包括被编程为执行方法的至少一部分的控制器。

公开(公告)号：US09377423B2

公开(公告)日：2016-06-28

申请号：US14141781

申请日：2013-12-27

Applicant: Cascade Microtech, Inc.

Inventor： Botho Hirschfeld ,  Axel Becker

IPC: G01N25/66 ,  G01R31/00 ,  G01R31/28

CPC classification number: G01N25/66 ,  G01R31/00 ,  G01R31/2862

Abstract: Disclosed systems and methods for testing a device under test (DUT) with a probe system are selected to test a DUT at a temperature below the dew point of the ambient environment surrounding the probe system. Probe systems include a measurement chamber configured to isolate a cool, dry testing environment and a measurement chamber door configured to selectively isolate the internal volume of the measurement chamber. When a DUT, that is or is included on a substrate, is tested at a low temperature, systems and methods are selected to heat the substrate in a dry environment, at least partially isolated from the measurement chamber, to at least a temperature above the dew point and/or the frost point of the ambient environment.

Abstract translation: 选择用于使用探针系统测试被测设备（DUT）的公开的系统和方法，以在低于探针系统周围环境环境露点的温度下测试DUT。 探测系统包括被配置为隔离冷却干燥测试环境的测量室和被配置为选择性地隔离测量室的内部体积的测量室门。 当在低温下测试被包括在基底上的DUT时，选择系统和方法以将至少部分与测量室隔离的干燥环境中的衬底加热至至少高于 露点和/或周围环境的霜点。