公开(公告)号：US07563625B2

公开(公告)日：2009-07-21

申请号：US11618468

申请日：2006-12-29

申请人： Chuong Anh Tran ,  Trung Tri Doan ,  Chen-Fu Chu ,  Hao-Chun Cheng ,  Feng-Hsu Fan

发明人： Chuong Anh Tran ,  Trung Tri Doan ,  Chen-Fu Chu ,  Hao-Chun Cheng ,  Feng-Hsu Fan

IPC分类号： H01L21/00

CPC分类号： H01L33/22 ,  H01L33/0095

摘要： Methods for fabricating a semiconductor light-emitting diode (LED) device with increased light extraction are provided. The method generally includes applying a mask to a surface of an LED wafer, etching the surface of the LED wafer such that etched pits are formed in the surface, removing the mask, and roughening or texturing the surface of the LED wafer including the etched pits. In this manner, the surface area of the LED device may be increased when compared to a conventional LED device, and less emitted light may experience total internal reflection (TIR) according to Snell's law, thereby leading to increased light extraction.

摘要翻译： 提供了用于制造具有增加的光提取的半导体发光二极管（LED）装置的方法。 该方法通常包括将掩模施加到LED晶片的表面，蚀刻LED晶片的表面，使得在表面形成蚀刻的凹坑，去除掩模，以及使包含蚀刻凹坑的LED晶片的表面变粗糙或纹理化 。 以这种方式，与传统的LED器件相比，LED器件的表面积可以增加，并且较少的发射光可以根据斯涅耳定律经历全内反射（TIR），从而导致增加的光提取。

公开(公告)号：US08283652B2

公开(公告)日：2012-10-09

申请号：US12845007

申请日：2010-07-28

申请人： Chen-Fu Chu ,  Feng-Hsu Fan ,  Hao-Chun Cheng ,  Trung Tri Doan

发明人： Chen-Fu Chu ,  Feng-Hsu Fan ,  Hao-Chun Cheng ,  Trung Tri Doan

IPC分类号： H01L33/04

CPC分类号： H01L33/38 ,  H01L33/32 ,  H01L33/405 ,  H01L33/44 ,  H01L33/641 ,  H01L33/647

摘要： A vertical light emitting diode (VLED) die includes a metal base; a mirror on the metal base; a p-type semiconductor layer on the reflector layer; a multiple quantum well (MQW) layer on the p-type semiconductor layer configured to emit light; and an n-type semiconductor layer on the multiple quantum well (MQW) layer. The vertical light emitting diode (VLED) die also includes an electrode and an electrode frame on the n-type semiconductor layer, and an organic or inorganic material contained within the electrode frame. The electrode and the electrode frame are configured to provide a high current capacity and to spread current from the outer periphery to the center of the n-type semiconductor layer. The vertical light emitting diode (VLED) die can also include a passivation layer formed on the metal base surrounding and electrically insulating the electrode frame, the edges of the mirror, the edges of the p-type semiconductor layer, the edges of the multiple quantum well (MQW) layer and the edges of the n-type semiconductor layer.

摘要翻译： 垂直发光二极管（VLED）模具包括金属基底; 金属底座上的镜子; 反射层上的p型半导体层; 配置成发光的p型半导体层上的多量子阱（MQW）层; 和多量子阱（MQW）层上的n型半导体层。 垂直发光二极管（VLED）裸片还包括在n型半导体层上的电极和电极框架，以及包含在电极框架内的有机或无机材料。 电极和电极框架被配置为提供高电流容量并且将电流从外周延伸到n型半导体层的中心。 垂直发光二极管（VLED）裸片还可以包括形成在金属基底上的钝化层，该钝化层围绕并电绝缘电极框架，反射镜的边缘，p型半导体层的边缘，多个量子的边缘 （MQW）层和n型半导体层的边缘。

公开(公告)号：US08124454B1

公开(公告)日：2012-02-28

申请号：US11548629

申请日：2006-10-11

申请人： Chen-Fu Chu ,  Trung Tri Doan ,  Chuong Anh Tran ,  Chao-Chen Cheng ,  Jiunn-Yi Chu ,  Wen-Huang Liu ,  Hao-Chun Cheng ,  Feng-Hsu Fan ,  Jui-Kang Yen

发明人： Chen-Fu Chu ,  Trung Tri Doan ,  Chuong Anh Tran ,  Chao-Chen Cheng ,  Jiunn-Yi Chu ,  Wen-Huang Liu ,  Hao-Chun Cheng ,  Feng-Hsu Fan ,  Jui-Kang Yen

IPC分类号： H01L21/00

CPC分类号： H01L33/0079 ,  H01L33/0095 ,  H01L33/44 ,  H01L33/46 ,  H01S5/0201 ,  H01S5/0217 ,  H01S5/32341

摘要： Techniques for fabricating metal devices, such as vertical light-emitting diode (VLED) devices, power devices, laser diodes, and vertical cavity surface emitting laser devices, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, the invention discloses techniques in the fabrication arts that are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non- (or low) thermally conductive and/or non- (or low) electrically conductive carrier substrate that has been removed.

摘要翻译： 提供了用于制造金属器件的技术，例如垂直发光二极管（VLED）器件，功率器件，激光二极管和垂直腔表面发射激光器件。 相应地生产的器件可以比常规金属器件更高的产量和更高的性能受益，例如发光二极管的较高的亮度和增加的导热性。 此外，本发明公开了在具有原始非导热和/或非导电性的金属器件的高散热率的情况下适用于GaN基电子器件的制造技术中的技术。 （或低）导电载体衬底。

公开(公告)号：US20110217799A1

公开(公告)日：2011-09-08

申请号：US13109687

申请日：2011-05-17

申请人： Chen-Fu Chu ,  Trung Tri Doan ,  Hao-Chun Cheng ,  Feng-Hsu Fan ,  Fu-Hsien Wang

发明人： Chen-Fu Chu ,  Trung Tri Doan ,  Hao-Chun Cheng ,  Feng-Hsu Fan ,  Fu-Hsien Wang

IPC分类号： H01L21/786

CPC分类号： H01L33/0079 ,  H01L33/0095

摘要： A method for the separation of multiple dies during semiconductor fabrication is described. On an upper surface of a semiconductor wafer containing multiple dies, metal layers are deposited everywhere except where a block of stop electroplating material exists. The stop electroplating material is obliterated, and a barrier layer is formed above the entire remaining structure. A sacrificial metal element is added above the barrier layer, and then the substrate is removed. After the semiconductor material between the individual dies is eradicated, any desired bonding pads and patterned circuitry are added to the semiconductor surface opposite the sacrificial metal element, a passivation layer is added to this surface, and then the sacrificial metal element is removed. Tape is added to the now exposed barrier layer, the passivation layer is removed, the resulting structure is flipped over, and the tape is expanded to separate the individual dies.

摘要翻译： 描述了在半导体制造期间分离多个管芯的方法。 在包含多个模具的半导体晶片的上表面上，除了存在一块停止电镀材料之外，金属层被沉积​​。 停止电镀材料被消除，并且在整个剩余结构上方形成阻挡层。 在阻挡层上方添加牺牲金属元素，然后去除衬底。 在消除各个管芯之间的半导体材料之后，将任何期望的接合焊盘和图案化电路添加到与牺牲金属元件相对的半导体表面，在该表面上添加钝化层，然后去除牺牲金属元件。 将胶带添加到现在暴露的阻挡层中，去除钝化层，将所得结构翻转，并且将带扩展以分离各个模具。

公开(公告)号：US20070212854A1

公开(公告)日：2007-09-13

申请号：US11682814

申请日：2007-03-06

申请人： Chen-Fu Chu ,  Trung Tri Doan ,  Hao-Chun Cheng ,  Feng-Hsu Fan ,  Fu-Hsien Wang

发明人： Chen-Fu Chu ,  Trung Tri Doan ,  Hao-Chun Cheng ,  Feng-Hsu Fan ,  Fu-Hsien Wang

IPC分类号： H01L21/00

CPC分类号： H01L33/0079 ,  H01L33/0095

摘要： A method for the separation of multiple dies during semiconductor fabrication is described. On an upper surface of a semiconductor wafer containing multiple dies, metal layers are deposited everywhere except where a block of stop electroplating material exists. The stop electroplating material is obliterated, and a barrier layer is formed above the entire remaining structure. A sacrificial metal element is added above the barrier layer, and then the substrate is removed. After the semiconductor material between the individual dies is eradicated, any desired bonding pads and patterned circuitry are added to the semiconductor surface opposite the sacrificial metal element, a passivation layer is added to this surface, and then the sacrificial metal element is removed. Tape is added to the now exposed barrier layer, the passivation layer is removed, the resulting structure is flipped over, and the tape is expanded to separate the individual dies.

摘要翻译： 描述了在半导体制造期间分离多个管芯的方法。 在包含多个模具的半导体晶片的上表面上，除了存在一块停止电镀材料之外，金属层被沉积​​。 停止电镀材料被消除，并且在整个剩余结构上方形成阻挡层。 在阻挡层上方添加牺牲金属元素，然后去除衬底。 在消除各个管芯之间的半导体材料之后，将任何期望的接合焊盘和图案化电路添加到与牺牲金属元件相对的半导体表面，在该表面上添加钝化层，然后去除牺牲金属元件。 将胶带添加到现在暴露的阻挡层中，去除钝化层，将所得结构翻转，并且将带扩展以分离各个模具。

公开(公告)号：US08802469B2

公开(公告)日：2014-08-12

申请号：US13109687

申请日：2011-05-17

申请人： Chen-Fu Chu ,  Trung Tri Doan ,  Hao-Chun Cheng ,  Feng-Hsu Fan ,  Fu-Hsien Wang

发明人： Chen-Fu Chu ,  Trung Tri Doan ,  Hao-Chun Cheng ,  Feng-Hsu Fan ,  Fu-Hsien Wang

IPC分类号： H01L21/301

CPC分类号： H01L33/0079 ,  H01L33/0095

摘要： A method for the separation of multiple dies during semiconductor fabrication is described. On an upper surface of a semiconductor wafer containing multiple dies, metal layers are deposited everywhere except where a block of stop electroplating material exists. The stop electroplating material is obliterated, and a barrier layer is formed above the entire remaining structure. A sacrificial metal element is added above the barrier layer, and then the substrate is removed. After the semiconductor material between the individual dies is eradicated, any desired bonding pads and patterned circuitry are added to the semiconductor surface opposite the sacrificial metal element, a passivation layer is added to this surface, and then the sacrificial metal element is removed. Tape is added to the now exposed barrier layer, the passivation layer is removed, the resulting structure is flipped over, and the tape is expanded to separate the individual dies.

摘要翻译： 描述了在半导体制造期间分离多个管芯的方法。 在包含多个模具的半导体晶片的上表面上，除了存在一块停止电镀材料之外，金属层被沉积​​。 停止电镀材料被消除，并且在整个剩余结构上方形成阻挡层。 在阻挡层上方添加牺牲金属元素，然后去除衬底。 在消除各个管芯之间的半导体材料之后，将任何期望的接合焊盘和图案化电路添加到与牺牲金属元件相对的半导体表面，在该表面上添加钝化层，然后去除牺牲金属元件。 将胶带添加到现在暴露的阻挡层中，去除钝化层，将所得结构翻转，并且将带扩展以分离各个模具。

公开(公告)号：US08552458B2

公开(公告)日：2013-10-08

申请号：US12824163

申请日：2010-06-26

申请人： Trung Tri Doan ,  Chen-Fu Chu ,  Wen-Huang Liu ,  Feng-Hsu Fan ,  Hao-Chun Cheng ,  Fu-Hsien Wang

发明人： Trung Tri Doan ,  Chen-Fu Chu ,  Wen-Huang Liu ,  Feng-Hsu Fan ,  Hao-Chun Cheng ,  Fu-Hsien Wang

IPC分类号： H01L33/02

CPC分类号： H01L33/62 ,  H01L33/641 ,  H01L2224/73265 ,  H01L2933/0066

摘要： A light emitting diode includes a thermal conductive substrate having at least one electrical isolation layer configured to provide vertical electrical isolation and a heat transfer path through the substrate from a front side (first side) to a back side (second side) thereof. The light emitting diode includes an anode having a through interconnect, and a cathode having a through interconnect, which are arranged side by side on the substrate. The light emitting diode also includes a LED chip mounted to the substrate between the anode and the cathode. A method for fabricating the light emitting diode includes the steps of providing a thermal conductive substrate having an electrical isolation layer, forming an anode via and a cathode via side by side on a first side of the substrate part way through the substrate, forming an anode through interconnect in the anode via and a cathode through interconnect in the cathode via, thinning the substrate from a second side of the substrate to the anode through interconnect and the cathode through interconnect, and mounting a LED chip to the first side in electrical communication with the cathode through interconnect and the anode through interconnect.

摘要翻译： 发光二极管包括具有至少一个电隔离层的导热基板，该隔离层被配置为提供垂直电隔离和从基板的前侧（第一侧）到其后侧（第二侧）穿过基板的热传递路径。 发光二极管包括具有贯通互连的阳极和在基板上并排布置的具有通孔互连的阴极。 发光二极管还包括安装在阳极和阴极之间的衬底上的LED芯片。 一种制造发光二极管的方法包括以下步骤：提供具有电隔离层的导热衬底，在衬底的第一侧经由衬底并排形成阳极通孔和阴极，形成阳极 通过在阴极通孔中通过互连在阳极通孔和阴极之间的互连，通过互连将互连和阴极通过互连将衬底从衬底的第二侧延伸到阳极，并将LED芯片安装到与第一侧电连通的第一侧 阴极通过互连和阳极通过互连。

公开(公告)号：US20120025167A1

公开(公告)日：2012-02-02

申请号：US12845007

申请日：2010-07-28

申请人： Chen-Fu Chu ,  Feng-Hsu Fan ,  Hao-Chun Cheng ,  Trung Tri Doan

发明人： Chen-Fu Chu ,  Feng-Hsu Fan ,  Hao-Chun Cheng ,  Trung Tri Doan

IPC分类号： H01L33/04

CPC分类号： H01L33/38 ,  H01L33/32 ,  H01L33/405 ,  H01L33/44 ,  H01L33/641 ,  H01L33/647

摘要： A vertical light emitting diode (VLED) die includes a metal base; a mirror on the metal base; a p-type semiconductor layer on the reflector layer; a multiple quantum well (MQW) layer on the p-type semiconductor layer configured to emit light; and an n-type semiconductor layer on the multiple quantum well (MQW) layer. The vertical light emitting diode (VLED) die also includes an electrode and an electrode frame on the n-type semiconductor layer, and an organic or inorganic material contained within the electrode frame. The electrode and the electrode frame are configured to provide a high current capacity and to spread current from the outer periphery to the center of the n-type semiconductor layer. The vertical light emitting diode (VLED) die can also include a passivation layer formed on the metal base surrounding and electrically insulating the electrode frame, the edges of the mirror, the edges of the p-type semiconductor layer, the edges of the multiple quantum well (MQW) layer and the edges of the n-type semiconductor layer.

摘要翻译： 垂直发光二极管（VLED）模具包括金属基底; 金属底座上的镜子; 反射层上的p型半导体层; 配置成发光的p型半导体层上的多量子阱（MQW）层; 和多量子阱（MQW）层上的n型半导体层。 垂直发光二极管（VLED）裸片还包括在n型半导体层上的电极和电极框架，以及包含在电极框架内的有机或无机材料。 电极和电极框架被配置为提供高电流容量并且将电流从外周延伸到n型半导体层的中心。 垂直发光二极管（VLED）裸片还可以包括形成在金属基底上的钝化层，该钝化层围绕并电绝缘电极框架，反射镜的边缘，p型半导体层的边缘，多个量子的边缘 （MQW）层和n型半导体层的边缘。

公开(公告)号：US08507302B1

公开(公告)日：2013-08-13

申请号：US11548624

申请日：2006-10-11

申请人： Chen-Fu Chu ,  Hao-Chun Cheng ,  Trung Tri Doan ,  Feng-Hsu Fan

发明人： Chen-Fu Chu ,  Hao-Chun Cheng ,  Trung Tri Doan ,  Feng-Hsu Fan

IPC分类号： H01L21/301

CPC分类号： H01L33/0079 ,  H01L33/0095 ,  H01L33/44 ,  H01L33/46 ,  H01S5/0201 ,  H01S5/0217 ,  H01S5/32341

摘要： Techniques for fabricating metal devices, such as vertical light-emitting diode (VLED) devices, power devices, laser diodes, and vertical cavity surface emitting laser devices, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, the invention discloses techniques in the fabrication arts that are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non- (or low) thermally conductive and/or non- (or low) electrically conductive carrier substrate that has been removed.

摘要翻译： 用于制造金属的装置，例如垂直发光二极管（VLED）器件，功率器件，激光二极管，及垂直腔表面发射激光器件的技术，提供了。 相应地产生的器件可以受益于更高的收率和比常规的金属器件，如发光二极管的更高的亮度和增加的热导率增强的性能。 此外，本发明公开了在具有原始非导热和/或非导电性的金属器件的高散热率的情况下适用于GaN基电子器件的制造技术中的技术。 （或低）导电载体衬底。

公开(公告)号：US20110316034A1

公开(公告)日：2011-12-29

申请号：US12824163

申请日：2010-06-26

申请人： Trung Tri Doan ,  Chen-Fu Chu ,  Wen-Huang Liu ,  Feng-Hsu Fan ,  Hao-Chun Cheng ,  Fu-Hsien Wang

发明人： Trung Tri Doan ,  Chen-Fu Chu ,  Wen-Huang Liu ,  Feng-Hsu Fan ,  Hao-Chun Cheng ,  Fu-Hsien Wang

IPC分类号： H01L33/02 ,  H01L33/62 ,  H01L33/64 ,  H01L33/48

CPC分类号： H01L33/62 ,  H01L33/641 ,  H01L2224/73265 ,  H01L2933/0066

摘要： A light emitting diode includes a thermal conductive substrate having at least one electrical isolation layer configured to provide vertical electrical isolation and a heat transfer path through the substrate from a front side (first side) to a back side (second side) thereof. The light emitting diode includes an anode having a through interconnect, and a cathode having a through interconnect, which are arranged side by side on the substrate. The light emitting diode also includes a LED chip mounted to the substrate between the anode and the cathode. A method for fabricating the light emitting diode includes the steps of providing a thermal conductive substrate having an electrical isolation layer, forming an anode via and a cathode via side by side on a first side of the substrate part way through the substrate, forming an anode through interconnect in the anode via and a cathode through interconnect in the cathode via, thinning the substrate from a second side of the substrate to the anode through interconnect and the cathode through interconnect, and mounting a LED chip to the first side in electrical communication with the cathode through interconnect and the anode through interconnect.

摘要翻译： 发光二极管包括具有至少一个电隔离层的导热基板，该隔离层被配置为提供垂直电隔离和从基板的前侧（第一侧）到其后侧（第二侧）穿过基板的热传递路径。 发光二极管包括具有贯通互连的阳极和在基板上并排布置的具有通孔互连的阴极。 发光二极管还包括安装在阳极和阴极之间的衬底上的LED芯片。 一种制造发光二极管的方法包括以下步骤：提供具有电隔离层的导热衬底，在衬底的第一侧经由衬底并排形成阳极通孔和阴极，形成阳极 通过在阴极通孔中通过互连在阳极通孔和阴极之间的互连，通过互连将互连和阴极通过互连将衬底从衬底的第二侧延伸到阳极，并将LED芯片安装到与第一侧电连通的第一侧 阴极通过互连和阳极通过互连。