公开(公告)号：US20240237589A1

公开(公告)日：2024-07-18

申请号：US18562745

申请日：2022-05-12

Applicant: Cheng LI

Inventor： Cheng LI

IPC: A01G9/029 ,  A01G7/04 ,  A01G9/00 ,  A01G31/02

CPC classification number: A01G9/0297 ,  A01G7/045 ,  A01G31/02 ,  A01G2009/003

Abstract: By providing a high-density grow rack system, mechanized through the use of tracks and trays for conveyance, non-productive space in vertical farms is minimized, and optimization for space in vertical farms is achieved. Advantages of the system include: flexibility and integration, allowing adaptability to various vertical farming layouts and seamless transition between growing and processing phases; modular processing units for assembly-line-style crop processing, enhancing operational efficiency; interconnected crop trays on tracks, eliminating non-productive gaps and significantly improving space utilization; adjustable layer heights catering to different crop growth stages; and independent climate control with insulating boards between units, reducing energy consumption and waste. Overall, this system significantly advances vertical farming efficiency and productivity.

公开(公告)号：US20120237017A1

公开(公告)日：2012-09-20

申请号：US13482642

申请日：2012-05-29

Applicant: Cheng LI ,  Guozhu LONG ,  Jie LV ,  Huishen DONG ,  Liming FANG

Inventor： Cheng LI ,  Guozhu LONG ,  Jie LV ,  Huishen DONG ,  Liming FANG

IPC: H01P5/12 ,  H04M9/08

CPC classification number: H04L5/20 ,  H04L25/0272

Abstract: The present invention provides a method, a device and a system for extending channels, and belongs to the field of communications technologies. The method includes: generating a non-cascade extended channel by using a first channel and a second channel; and generating a first-level cascade extended channel by using the non-cascade extended channel and a third channel, where the first channel and the second channel are both twisted-pair channels, and the third channel is a twisted-pair channel or another non-cascade extended channel. The device includes a first transformer and a second transformer. The system includes a first device and a second device.

Abstract translation: 本发明提供一种用于扩展信道的方法，装置和系统，属于通信技术领域。 该方法包括：通过使用第一信道和第二信道来产生非级联扩展信道; 以及通过使用非级联扩展信道和第三信道来生成第一级级联扩展信道，其中第一信道和第二信道都是双绞线信道，并且第三信道是双绞线信道或另一非信道 级联扩展通道。 该装置包括第一变压器和第二变压器。 该系统包括第一设备和第二设备。

公开(公告)号：US20110019117A1

公开(公告)日：2011-01-27

申请号：US12840575

申请日：2010-07-21

Applicant: Hailin XUE ,  Bingqian LIN ,  Yubo XU ,  Cheng LI

Inventor： Hailin XUE ,  Bingqian LIN ,  Yubo XU ,  Cheng LI

IPC: G02F1/136 ,  H01L21/336

CPC classification number: H01L27/124 ,  G02F1/13624

Abstract: A thin film transistor liquid crystal display (TFT-LCD) array substrate comprising a first gate line, a second gate line and a data line, which are formed on a substrate and define a pixel region, the first and second gate lines being parallel to each other, a pixel electrode, and a first thin film transistor (TFT) and a second TFT provided in the pixel region. The first TFT comprises a first gate electrode and a first drain electrode, the second TFT comprises a second gate electrode and a second drain electrode, and parasitic capacitance generated between the first drain electrode and the first gate electrode is equal to parasitic capacitance generated between the second drain electrode and the second gate electrode. Both the first drain electrode and the second drain electrode are connected with the pixel electrode. When an “ON” voltage is supplied to the first TFT via the first gate line, a first voltage is supplied to the second TFT via the second gate line; when an “OFF” voltage is supplied to the first TFT via the first gate line, a second voltage is supplied to the second TFT via the second gate line, wherein the “ON” voltage−the “OFF” voltage=the second voltage−the first voltage.

Abstract translation: 一种薄膜晶体管液晶显示器（TFT-LCD）阵列基板，包括形成在基板上并限定像素区域的第一栅极线，第二栅极线和数据线，所述第一和第二栅极线平行于 彼此，像素电极以及设置在像素区域中的第一薄膜晶体管（TFT）和第二TFT。 第一TFT包括第一栅电极和第一漏电极，第二TFT包括第二栅电极和第二漏电极，并且在第一漏电极和第一栅电极之间产生的寄生电容等于在第 第二漏电极和第二栅电极。 第一漏电极和第二漏电极都与像素电极连接。 当通过第一栅极线向第一TFT提供“ON”电压时，经由第二栅极线将第一电压提供给第二TFT; 当通过第一栅极线向第一TFT提供“OFF”电压时，经由第二栅极线向第二TFT提供第二电压，其中“ON”电压 - “OFF”电压=第二电压 - 第一电压。

公开(公告)号：US20120081415A1

公开(公告)日：2012-04-05

申请号：US13242061

申请日：2011-09-23

Applicant: Hailin XUE ,  Yubo XU ,  Cheng LI ,  Xiaochuan CHEN ,  Xin LI ,  Shunshun QIU

Inventor： Hailin XUE ,  Yubo XU ,  Cheng LI ,  Xiaochuan CHEN ,  Xin LI ,  Shunshun QIU

IPC: G09G3/36 ,  G02F1/1343 ,  G09G5/10

CPC classification number: G09G3/3685 ,  G09G3/3648 ,  G09G2310/0205

Abstract: An array substrate is provided comprising a base substrate; an array of pixel electrodes formed on the base substrate; a plurality of gate lines, each of which is formed corresponding to each row of pixel electrodes; a plurality of data lines, each of which is formed corresponding to each odd number column of pixel electrodes and the next adjacent even number column of pixel electrodes; a plurality of first switching devices, each of which is connected with each odd-number-column pixel electrode, and the data lines charging the corresponding odd-number-column pixel electrodes via the corresponding first switching devices under driving control in corresponding time sequence; a plurality of second switching devices, each of which is connected with each even-number-column pixel electrode, and the data lines charging the corresponding even-number-column pixel electrodes via the corresponding second switching devices under driving control in corresponding time sequence.

Abstract translation: 提供了一种阵列基板，包括基底基板; 形成在基底基板上的像素电极阵列; 多个栅极线，每个栅极线对应于每行像素电极形成; 多个数据线，每个数据线对应于像素电极的每个奇数列和下一个相邻的偶数列列的像素电极; 多个第一开关器件，每个与每个奇数列像素电极连接，数据线通过对应的第一开关器件以相应的时间顺序驱动控制，对相应的奇数列像素电极进行充电; 多个第二开关器件，其每个与每个偶数列像素电极连接，并且数据线在相应的时间顺序的驱动控制下通过相应的第二开关器件对相应的偶数列像素电极进行充电。

公开(公告)号：US20230159007A1

公开(公告)日：2023-05-25

申请号：US17919168

申请日：2021-03-15

Applicant: Cheng LI

Inventor： Cheng LI

IPC: B60T1/10 ,  F02B63/06 ,  F02G5/00 ,  F25B27/02

CPC classification number: B60T1/10 ,  F02B63/06 ,  F02G5/00 ,  F25B27/02

Abstract: Provided is a high-pressure thermal fluid brake and engine energy recovery system, comprising a plurality of energy collection systems (1) and energy storage systems (2) which are connected to one another, and a control unit (19) connected to the energy collection systems (1) and the energy storage systems (2); the control unit (19) is connected to a vehicle controller, and at east reads and acquires the accelerator pedal position information, brake pedal position information, vehicle travel parameters, and cooling system parameters of a vehicle; the energy collection systems (1) recover vehicle's kinetic energy, engine's mechanical energy and engine's thermal energy, and stores the recovered energy into the energy storage systems (2), and the control unit (19) controls, according to the vehicle information read and acquired, the energy recovery and release of the energy collection systems (1) and the energy storage systems (2). The present invention can effectively recover and reuse vehicle's braking energy, engine's idle energy and engine's thermal energy, reduce the energy waste of a motor vehicle system, and achieve the purposes of energy saving, oil sav ing and emission reduction.

公开(公告)号：US20120161140A1

公开(公告)日：2012-06-28

申请号：US13332689

申请日：2011-12-21

Applicant: Hailin XUE ,  Yubo XU ,  Cheng LI ,  Jidong ZHANG

Inventor： Hailin XUE ,  Yubo XU ,  Cheng LI ,  Jidong ZHANG

IPC: H01L33/08 ,  H01L33/62

CPC classification number: G02F1/136286 ,  G02F2201/121 ,  H01L27/124

Abstract: An thin film transistor array and a manufacturing method thereof are provided. A thin film transistor (TFT) array substrate comprises a base substrate, horizontal gate lines, reticulated storage capacitor electrode (Vcom) lines, longitudinal data lines defining pixel units with the horizontal gate lines. The Vcom lines corresponding to the pixel units in each row of the reticulated Vcom line are connected with each other, and the reticulated Vcom lines are connected with an integrated-circuit (IC) element through Vcom line IC terminals; if the number of the data lines is N, the number of the Vcom line IC terminals is more than 0 and less than N+1; and at least one Vcom line longitudinal electric connection section is provided between the Vcom lines in two adjacent rows.

Abstract translation: 提供薄膜晶体管阵列及其制造方法。 薄膜晶体管（TFT）阵列基板包括基底，水平栅极线，网状存储电容电极（Vcom）线，用水平栅极线限定像素单元的纵向数据线。 对应于网状Vcom线的每行中的像素单元的Vcom线彼此连接，网状Vcom线通过Vcom线IC端子与集成电路（IC）元件连接; 如果数据线的数量为N，则Vcom线路IC端子的数量大于0且小于N + 1; 并且在两个相邻行中的Vcom线之间提供至少一个Vcom线纵向电连接部。

公开(公告)号：US20120320320A1

公开(公告)日：2012-12-20

申请号：US13524144

申请日：2012-06-15

Applicant: Dong CHEN ,  Xue DONG ,  Cheng LI

Inventor： Dong CHEN ,  Xue DONG ,  Cheng LI

IPC: G02F1/1335 ,  H01L27/15

CPC classification number: G02F1/133707 ,  G02F1/134309 ,  G02F2001/134381

Abstract: An embodiment of the present disclosure provides an array substrate, and the array substrate comprising: at least a data line and at least a gate line; and a plurality of pixel units defined by the data line and the gate line. Each of the plurality of pixel units comprises a thin film transistor, a first electrode and a second electrode, and the first electrode and the second electrode overlap each other and are insulated from each other and the second electrode is positioned above the first electrode. An alignment film is formed on a surface of the array substrate, a direction of the second electrode and one side of the array substrate form a predetermined angle and a rubbing direction of the alignment film is parallel to the one side of the array substrate.

Abstract translation: 本公开的实施例提供阵列基板，并且阵列基板包括：至少数据线和至少栅极线; 以及由数据线和栅极线限定的多个像素单元。 多个像素单元中的每一个包括薄膜晶体管，第一电极和第二电极，并且第一电极和第二电极彼此重叠并且彼此绝缘，并且第二电极位于第一电极的上方。 在阵列基板的表面上形成取向膜，第二电极的方向和阵列基板的一侧形成预定角度，并且取向膜的摩擦方向平行于阵列基板的一侧。