Microwave monolithic integrated circuit (MMIC) including distributed
cascode bipolar transistor amplifier unit
    1.
    发明授权
    Microwave monolithic integrated circuit (MMIC) including distributed cascode bipolar transistor amplifier unit 失效
    微波单片集成电路(MMIC)包括分布式共源共栅双极晶体管放大器单元

    公开(公告)号:US5274342A

    公开(公告)日:1993-12-28

    申请号:US843344

    申请日:1992-02-28

    IPC分类号: H03F1/22 H03F3/60 H03F3/68

    CPC分类号: H03F1/22 H03F3/605

    摘要: A microwave monolithic integrated circuit (MMIC) (40), includes a substrate (60), and an input bus (62), output bus (64), ground bus (66) and bias bus (68) formed as striplines of a four-line coplanar waveguide on the substrate (60) with the input bus (62) and output bus (64) disposed between the ground bus (66) and bias bus (68). A plurality of spatially distributed cascode amplifier units (43) are formed on the substrate (60), each including an input heterojunction bipolar transistor (HBT) (42) connected in a common-emitter configuration, and an output HBT (44) connected in a common-base configuration. The input HBT (42) has an emitter (E.sub.1) connected to the ground bus (66), a base (B.sub.1) connected to the input bus (62) and a collector (C.sub.1). The output HBT (44) has an emitter (E.sub.2) connected to the collector (C.sub.1) of the input HBT (42), a base (B.sub.2) connected to the bias bus (68) and a collector (C.sub.2) connected to the output bus (64). The distributed amplifier arrangement enables the HBTs (42,44) to operate with balanced electrical parameters and high thermal isolation and heat dissipation.

    摘要翻译: 一种微波单片集成电路(MMIC)(40),包括基板(60)和输入总线(62),输出总线(64),接地总线(66)和偏置总线(68),其形成为四线 具有输入总线(62)和布置在接地总线(66)和偏置总线(68)之间的输出总线(64)的衬底(60)上的直线共面波导。 多个空间分布的共源共栅放大器单元(43)形成在衬底(60)上,每个包括以共发射极配置连接的输入异质结双极晶体管(HBT)(42)和连接在其中的输出HBT(44) 共同基础配置。 输入HBT(42)具有连接到接地总线(66)的发射极(E1),连接到输入总线(62)的基极(B1)和集电极(C1)。 输出HBT(44)具有连接到输入HBT(42)的集电极(C1)的发射极(E2),连接到偏置总线(68)的基极(B2)和连接到输出端 公共汽车(64)。 分布式放大器布置使得HBT(42,44)能够平衡的电气参数和高热隔离和散热。

    Heterojunction bipolar transistor structure having low base-collector
capacitance, and method of fabricating the same
    2.
    发明授权
    Heterojunction bipolar transistor structure having low base-collector capacitance, and method of fabricating the same 失效
    具有低基极集电极电容的异质结双极晶体管结构及其制造方法

    公开(公告)号:US5252841A

    公开(公告)日:1993-10-12

    申请号:US6189

    申请日:1993-01-19

    摘要: The base-collector capacitance in a heterojunction bipolar transistor (HBT) (50) is reduced, thereby providing increased cutoff frequency and power gain, by eliminating a portion of a collector contact layer (54) which normally underlies a base electrode (66). A similar effect may be produced by forming the collector contact layer (54) such that it initially extends into the area (54c) under the base electrode (66), and subsequently rendering the collector contact layer (54) in this area (54c) semiinsulative by proton bombardment. A ballast resistor layer (70) is formed between an emitter layer (62) and an overlying emitter electrode (68) to prevent thermal runaway and hot spot formation. A plurality of the HBTs (50) may be arranged in a distributed amplifier configuration (80) including contact electrode bus lines (84,88) having a geometry designed to provide high thermal efficiency, and input and output circuit matching characteristics.

    摘要翻译: 异相结双极晶体管(HBT)(50)中的基极集电极电容减小,从而通过消除通常位于基极(66)下面的集电极接触层(54)的一部分来提供增加的截止频率和功率增益。 可以通过形成集电极接触层(54)使其最初延伸到基极(66)下方的区域(54c)中,并且随后使该集电极接触层(54)在该区域(54c)中形成,可以产生类似的效果, 半质子轰击。 在发射极层(62)和上覆发射电极(68)之间形成镇流电阻层(70),以防止热失控和热点形成。 多个HBT(50)可以布置在分布式放大器配置(80)中,包括具有设计用于提供高热效率的几何形状的接触电极总线(84,88)以及输入和输出电路匹配特性。