公开(公告)号：US20100096686A1

公开(公告)日：2010-04-22

申请号：US12647250

申请日：2009-12-24

申请人： Chi-Nan Li ,  Cheong Min Hong

发明人： Chi-Nan Li ,  Cheong Min Hong

IPC分类号： H01L29/788

CPC分类号： H01L29/42332 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11556 ,  H01L29/7881

摘要： An electronic device can include a substrate including a first trench having a first bottom and a first wall. The electrode device can also include a first gate electrode within the first trench and adjacent to the first wall and overlying the first bottom of the first trench, and a second gate electrode within the first trench and adjacent to the first gate electrode and overlying the first bottom of the first trench. The electronic device can further include discontinuous storage elements including a first set of discontinuous storage elements, wherein the first set of the discontinuous storage elements lies between (i) the first gate electrode or the second gate electrode and (ii) the first bottom of the first trench. Processes of forming and using the electronic device are also described.

摘要翻译： 电子设备可以包括包括具有第一底部和第一壁的第一沟槽的衬底。 所述电极装置还可以包括在所述第一沟槽内并且邻近所述第一壁并且覆盖所述第一沟槽的所述第一底部的第一栅极电极以及所述第一沟槽内的第一栅电极并且与所述第一栅电极相邻并且覆盖所述第一栅电极 底部的第一个沟槽。 电子设备还可以包括不连续的存储元件，其包括第一组不连续存储元件，其中第一组不连续存储元件位于（i）第一栅电极或第二栅电极之间，和（ii）第一底部的 第一沟 还描述了形成和使用电子设备的过程。

公开(公告)号：US07838922B2

公开(公告)日：2010-11-23

申请号：US11626753

申请日：2007-01-24

申请人： Chi-Nan Li ,  Cheong Min Hong

发明人： Chi-Nan Li ,  Cheong Min Hong

IPC分类号： H01L29/94

CPC分类号： H01L27/115 ,  B82Y10/00 ,  H01L21/28273 ,  H01L27/11521 ,  H01L29/66825 ,  H01L29/7881

摘要： An electronic device can include a substrate including a trench having a bottom and a first wall. The electronic device can also include a first gate electrode within the trench and adjacent to the first wall and overlying the bottom of the trench, a second gate electrode overlying the substrate outside of the trench, and a third gate electrode within the trench and adjacent to the first gate electrode and overlying the bottom of the trench. The electronic device can also include discontinuous storage elements including a first set of discontinuous storage elements, wherein the first set of the discontinuous storage elements lies adjacent to the first wall of the trench. Processes of forming and using the electronic device are also described.

摘要翻译： 电子设备可以包括包括具有底部和第一壁的沟槽的衬底。 电子器件还可包括在沟槽内并与第一壁相邻并且覆盖沟槽底部的第一栅电极，覆盖沟槽外部的衬底的第二栅电极和沟槽内的第三栅电极， 第一栅电极并且覆盖沟槽的底部。 电子设备还可以包括不连续的存储元件，包括第一组不连续的存储元件，其中第一组不连续的存储元件位于与沟槽的第一壁相邻的位置。 还描述了形成和使用电子设备的过程。

公开(公告)号：US08193572B2

公开(公告)日：2012-06-05

申请号：US12647250

申请日：2009-12-24

申请人： Chi-Nan Li ,  Cheong Min Hong

发明人： Chi-Nan Li ,  Cheong Min Hong

IPC分类号： H01L29/76

CPC分类号： H01L29/42332 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11556 ,  H01L29/7881

摘要： An electronic device can include a substrate including a first trench having a first bottom and a first wall. The electrode device can also include a first gate electrode within the first trench and adjacent to the first wall and overlying the first bottom of the first trench, and a second gate electrode within the first trench and adjacent to the first gate electrode and overlying the first bottom of the first trench. The electronic device can further include discontinuous storage elements including a first set of discontinuous storage elements, wherein the first set of the discontinuous storage elements lies between (i) the first gate electrode or the second gate electrode and (ii) the first bottom of the first trench. Processes of forming and using the electronic device are also described.

摘要翻译： 电子设备可以包括包括具有第一底部和第一壁的第一沟槽的衬底。 所述电极装置还可以包括在所述第一沟槽内并且邻近所述第一壁并且覆盖所述第一沟槽的所述第一底部的第一栅极电极以及所述第一沟槽内的第一栅电极并且与所述第一栅电极相邻并且覆盖所述第一栅电极 底部的第一个沟槽。 电子设备还可以包括不连续的存储元件，其包括第一组不连续存储元件，其中第一组不连续存储元件位于（i）第一栅电极或第二栅电极之间，和（ii）第一底部的 第一沟 还描述了形成和使用电子设备的过程。

公开(公告)号：US07651916B2

公开(公告)日：2010-01-26

申请号：US11626768

申请日：2007-01-24

申请人： Chi-Nan Li ,  Cheong Min Hong

发明人： Chi-Nan Li ,  Cheong Min Hong

IPC分类号： H01L21/336

CPC分类号： H01L29/42332 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11556 ,  H01L29/7881

摘要： An electronic device can include a substrate including a first trench having a first bottom and a first wall. The electrode device can also include a first gate electrode within the first trench and adjacent to the first wall and overlying the first bottom of the first trench, and a second gate electrode within the first trench and adjacent to the first gate electrode and overlying the first bottom of the first trench. The electronic device can further include discontinuous storage elements including a first set of discontinuous storage elements, wherein the first set of the discontinuous storage elements lies between (i) the first gate electrode or the second gate electrode and (ii) the first bottom of the first trench. Processes of forming and using the electronic device are also described.

摘要翻译： 电子设备可以包括包括具有第一底部和第一壁的第一沟槽的衬底。 所述电极装置还可以包括在所述第一沟槽内并且邻近所述第一壁并且覆盖所述第一沟槽的所述第一底部的第一栅极电极以及所述第一沟槽内的第一栅电极并且与所述第一栅电极相邻并且覆盖所述第一栅电极 底部的第一个沟槽。 电子设备还可以包括不连续的存储元件，其包括第一组不连续存储元件，其中第一组不连续存储元件位于（i）第一栅电极或第二栅电极之间，和（ii）第一底部的 第一沟 还描述了形成和使用电子设备的过程。

公开(公告)号：US07572699B2

公开(公告)日：2009-08-11

申请号：US11626762

申请日：2007-01-24

申请人： Cheong Min Hong ,  Chi-Nan Li

发明人： Cheong Min Hong ,  Chi-Nan Li

IPC分类号： H01L21/336

CPC分类号： H01L29/42332 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/66825 ,  H01L29/7887

摘要： An electronic device can include a substrate including a fin lying between a first trench and a second trench, wherein the fin is no more than approximately 90 nm wide. The electronic device can also include a first gate electrode within the first trench and adjacent to the fin, and a second gate electrode within the second trench and adjacent to the fin. The electronic device can further include discontinuous storage elements including a first set of discontinuous storage elements and a second set of discontinuous storage elements, wherein the first set of the discontinuous storage elements lies between the first gate electrode and the fin, and the second set of the discontinuous storage elements lies between the second gate electrode and the fin. Processes of forming and using the electronic device are also described.

摘要翻译： 电子设备可以包括包括位于第一沟槽和第二沟槽之间的翅片的衬底，其中鳍不大于约90nm宽。 电子器件还可以包括第一沟槽内的第一栅电极并与鳍片相邻，第二栅电极在第二沟槽内并与鳍片相邻。 电子设备还可以包括不连续存储元件，其包括第一组不连续存储元件和第二组不连续存储元件，其中第一组不连续存储元件位于第一栅电极和鳍之间，第二组 不连续的存储元件位于第二栅电极和鳍之间。 还描述了形成和使用电子设备的过程。

公开(公告)号：US20080173923A1

公开(公告)日：2008-07-24

申请号：US11626768

申请日：2007-01-24

申请人： Chi-Nan Li ,  Cheong Min HONG

发明人： Chi-Nan Li ,  Cheong Min HONG

IPC分类号： H01L29/788 ,  G11C11/34 ,  H01L21/336

CPC分类号： H01L29/42332 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11556 ,  H01L29/7881

摘要： An electronic device can include a substrate including a first trench having a first bottom and a first wall. The electrode device can also include a first gate electrode within the first trench and adjacent to the first wall and overlying the first bottom of the first trench, and a second gate electrode within the first trench and adjacent to the first gate electrode and overlying the first bottom of the first trench. The electronic device can further include discontinuous storage elements including a first set of discontinuous storage elements, wherein the first set of the discontinuous storage elements lies between (i) the first gate electrode or the second gate electrode and (ii) the first bottom of the first trench. Processes of forming and using the electronic device are also described.

摘要翻译： 电子设备可以包括包括具有第一底部和第一壁的第一沟槽的衬底。 所述电极装置还可以包括在所述第一沟槽内并且邻近所述第一壁并且覆盖所述第一沟槽的所述第一底部的第一栅极电极以及所述第一沟槽内的第一栅电极并且与所述第一栅电极相邻并且覆盖所述第一栅电极 底部的第一个沟槽。 电子设备还可以包括不连续的存储元件，其包括第一组不连续存储元件，其中第一组不连续存储元件位于（i）第一栅电极或第二栅电极之间，和（ii）第一底部的 第一沟 还描述了形成和使用电子设备的过程。

公开(公告)号：US20080173921A1

公开(公告)日：2008-07-24

申请号：US11626753

申请日：2007-01-24

申请人： Chi-Nan Li ,  Cheong Min Hong

发明人： Chi-Nan Li ,  Cheong Min Hong

IPC分类号： H01L27/108 ,  G11C11/34 ,  H01L21/336

CPC分类号： H01L27/115 ,  B82Y10/00 ,  H01L21/28273 ,  H01L27/11521 ,  H01L29/66825 ,  H01L29/7881

摘要： An electronic device can include a substrate including a trench having a bottom and a first wall. The electronic device can also include a first gate electrode within the trench and adjacent to the first wall and overlying the bottom of the trench, a second gate electrode overlying the substrate outside of the trench, and a third gate electrode within the trench and adjacent to the first gate electrode and overlying the bottom of the trench. The electronic device can also include discontinuous storage elements including a first set of discontinuous storage elements, wherein the first set of the discontinuous storage elements lies adjacent to the first wall of the trench. Processes of forming and using the electronic device are also described.

摘要翻译： 电子设备可以包括包括具有底部和第一壁的沟槽的衬底。 电子器件还可包括在沟槽内并与第一壁相邻并且覆盖沟槽底部的第一栅电极，覆盖沟槽外部的衬底的第二栅电极和沟槽内的第三栅电极， 第一栅电极并且覆盖沟槽的底部。 电子设备还可以包括不连续的存储元件，包括第一组不连续的存储元件，其中第一组不连续的存储元件位于与沟槽的第一壁相邻的位置。 还描述了形成和使用电子设备的过程。

公开(公告)号：US07459744B2

公开(公告)日：2008-12-02

申请号：US11525747

申请日：2006-09-22

申请人： Cheong M. Hong ,  Chi-Nan Li

发明人： Cheong M. Hong ,  Chi-Nan Li

IPC分类号： H01L27/108 ,  H01L21/336 ,  G01C11/34

CPC分类号： G11C16/10 ,  B82Y10/00 ,  H01L27/115 ,  H01L27/11556 ,  H01L29/4232 ,  H01L29/42332 ,  H01L29/42336 ,  H01L29/7881 ,  H01L29/792

摘要： A programmable storage device includes a first diffusion region underlying a portion of a first trench defined in a semiconductor substrate and a second diffusion region occupying an upper portion of the substrate adjacent to the first trench. The device includes a charge storage stack lining sidewalls and a portion of a floor of the first trench. The charge storage stack includes a layer of discontinuous storage elements (DSEs). Electrically conductive spacers formed on opposing sidewalls of the first trench adjacent to respective charge storage stacks serve as control gates for the device. The DSEs may be silicon, polysilicon, metal, silicon nitride, or metal nitride nanocrystals or nanoclusters. The storage stack includes a top dielectric of CVD silicon oxide overlying the nanocrystals overlying a bottom dielectric of thermally formed silicon dioxide. The device includes first and second injection regions in the layer of DSEs proximal to the first and second diffusion regions.

摘要翻译： 可编程存储装置包括在半导体衬底中限定的第一沟槽的一部分下面的第一扩散区域和占据与第一沟槽相邻的衬底的上部的第二扩散区域。 该装置包括一个电荷存储层，衬垫侧壁和第一沟槽的一部分地板。 电荷存储堆叠包括不连续存储元件（DSE）层。 形成在与相应电荷存储堆叠相邻的第一沟槽的相对侧壁上的导电间隔件用作该装置的控制栅极。 DSE可以是硅，多晶硅，金属，氮化硅或金属氮化物纳米晶体或纳米团簇。 存储堆叠包括覆盖在热形成的二氧化硅的底部电介质上的纳米晶体上的CVD氧化硅的顶部电介质。 该装置包括位于第一和第二扩散区域附近的DSE层中的第一和第二注入区域。

公开(公告)号：US07112490B1

公开(公告)日：2006-09-26

申请号：US11188604

申请日：2005-07-25

申请人： Cheong Hong ,  Chi-Nan Li

发明人： Cheong Hong ,  Chi-Nan Li

IPC分类号： H01L21/336 ,  H01L21/84 ,  H01L21/8242 ,  H01L29/76 ,  G11C11/34

CPC分类号： G11C16/10 ,  B82Y10/00 ,  H01L27/115 ,  H01L27/11556 ,  H01L29/4232 ,  H01L29/42332 ,  H01L29/42336 ,  H01L29/7881 ,  H01L29/792

摘要： A programmable storage device includes a first diffusion region underlying a portion of a first trench defined in a semiconductor substrate and a second diffusion region occupying an upper portion of the substrate adjacent to the first trench. The device includes a charge storage stack lining sidewalls and a portion of a floor of the first trench. The charge storage stack includes a layer of discontinuous storage elements (DSEs). Electrically conductive spacers formed on opposing sidewalls of the first trench adjacent to respective charge storage stacks serve as control gates for the device. The DSEs may be silicon, polysilicon, metal, silicon nitride, or metal nitride nanocrystals or nanoclusters. The storage stack includes a top dielectric of CVD silicon oxide overlying the nanocrystals overlying a bottom dielectric of thermally formed silicon dioxide. The device includes first and second injection regions in the layer of DSEs proximal to the first and second diffusion regions.

摘要翻译： 可编程存储装置包括在半导体衬底中限定的第一沟槽的部分下面的第一扩散区域和占据与第一沟槽相邻的衬底的上部的第二扩散区域。 该装置包括一个电荷存储层，衬垫侧壁和第一沟槽的一部分地板。 电荷存储堆叠包括不连续存储元件（DSE）层。 形成在与相应电荷存储堆叠相邻的第一沟槽的相对侧壁上的导电间隔件用作该装置的控制栅极。 DSE可以是硅，多晶硅，金属，氮化硅或金属氮化物纳米晶体或纳米团簇。 存储堆叠包括覆盖在热形成的二氧化硅的底部电介质上的纳米晶体上的CVD氧化硅的顶部电介质。 该装置包括位于第一和第二扩散区域附近的DSE层中的第一和第二注入区域。

公开(公告)号：US20070190720A1

公开(公告)日：2007-08-16

申请号：US11355822

申请日：2006-02-16

申请人： Chi-Nan Li ,  Cheong Hong

发明人： Chi-Nan Li ,  Cheong Hong

IPC分类号： H01L21/336

CPC分类号： H01L27/105 ,  H01L27/11526 ,  H01L27/11536

摘要： A method for forming a portion of a semiconductor device includes: patterning gate stack layers overlying a substrate into a gate stack; implanting dopant ions to form shallow source/drain extension implant regions in the substrate adjacent to the gate stack; oxidizing the gate stack at first oxidation conditions to form an oxidation layer on sidewalls of the gate stack; and oxidizing the gate stack at second oxidation conditions to form further oxidation of the oxidation layer on sidewalls of the gate stack. The second oxidation conditions are different from the first oxidation conditions.

摘要翻译： 用于形成半导体器件的一部分的方法包括：将覆盖在衬底上的栅叠层层图案化成栅叠层; 注入掺杂剂离子以在与栅叠层相邻的衬底中形成浅源极/漏极延伸注入区; 在第一氧化条件下氧化栅极堆叠以在栅叠层的侧壁上形成氧化层; 以及在第二氧化条件下氧化所述栅极堆叠以在所述栅极叠层的侧壁上形成氧化层的进一步氧化。 第二氧化条件与第一氧化条件不同。