公开(公告)号：US20090146981A1

公开(公告)日：2009-06-11

申请号：US12104449

申请日：2008-04-17

申请人： Chi-Wen Chen ,  Ming-Sheng Lai ,  Min-Feng Chiang ,  Po-Yuan Liu

发明人： Chi-Wen Chen ,  Ming-Sheng Lai ,  Min-Feng Chiang ,  Po-Yuan Liu

IPC分类号： G09G5/00

CPC分类号： G09G3/3406 ,  G09G2320/064 ,  G09G2360/144

摘要： The present invention provides a light detection system essentially including a light detection circuit for generating a light detection signal by performing a light detection process, an integration-period control circuit for generating a control signal based on the light detection signal, and an integration circuit for adjusting an integration period based on the control signal and generating a readout signal by performing an integration process on the light detection signal during the adjusted integration period. The present invention further provides a light detection method essentially including providing a plurality of integration periods, generating a light detection signal by performing a light detection process, selecting an integration period out of the provided integration periods based on the light detection signal, and generating a readout signal by performing an integration process on the light detection signal during the selected integration period.

摘要翻译： 本发明提供一种光检测系统，其基本上包括：通过执行光检测处理产生光检测信号的光检测电路;基于光检测信号产生控制信号的积分周期控制电路;以及用于 基于所述控制信号调整积分期间，并通过在调整后的积分期间对所述光检测信号进行积分处理来生成读出信号。 本发明还提供了一种光检测方法，其基本上包括提供多个积分周期，通过执行光检测处理产生光检测信号，基于光检测信号从提供的积分周期中选择积分期，并产生 在所选择的积分期间对光检测信号进行积分处理。

公开(公告)号：US07817771B2

公开(公告)日：2010-10-19

申请号：US12334874

申请日：2008-12-15

申请人： Tsung-Ting Tsai ,  Ming-Sheng Lai ,  Min-Feng Chiang ,  Po-Yuan Liu

发明人： Tsung-Ting Tsai ,  Ming-Sheng Lai ,  Min-Feng Chiang ,  Po-Yuan Liu

IPC分类号： G11C19/00

CPC分类号： G11C19/28

摘要： A shift register comprises a plurality of stages, {Sn}, n=1, 2, . . . , N, N being a positive integer. In one embodiment, each stage Sn includes a pull-up circuit having an input for receiving one of a first clock signal, CK1, and a second clock signal, XCK1, an output for responsively outputting an output signal, On, and an input node Qn, a pull-up control circuit electrically coupled to the input node Qn and configured such that when receiving a first input signal, the pull-up control circuit responsively generates a signal that is provided to the input node Qn to turn on the pull-up circuit, a pull-down circuit electrically coupled to the input node Qn and configured to provide a first voltage to one of the input node Qn and the output of the pull-up circuit, and a pull-down control circuit configured to receive one of a third clock signal, CK2, and a fourth clock signal, XCK2, and responsively generate the first voltage to turn on the pull-down circuit of the stage Sn and the pull-down circuit of one of the stage Sn−1 and the stage Sn+1.

摘要翻译： 移位寄存器包括多个级，{Sn}，n = 1,2。 。 。 ，N，N为正整数。 在一个实施例中，每级Sn包括一个上拉电路，该上拉电路具有用于接收第一时钟信号CK1和第二时钟信号XCK1中的一个的输入端，用于响应地输出输出信号的输出端和输入节点 Qn是电耦合到输入节点Qn并被配置为使得当接收到第一输入信号时，上拉控制电路响应地产生提供给输入节点Qn的信号，以接通上拉电路， 电耦合到输入节点Qn并被配置为向输入节点Qn和上拉电路的输出之一提供第一电压的下拉电路，以及被配置为接收一个电压的下拉控制电路 第三时钟信号CK2和第四时钟信号XCK2，并且响应地产生第一电压以接通级Sn的下拉电路和级Sn-1之一的下拉电路和 阶段Sn + 1。

公开(公告)号：US08031827B2

公开(公告)日：2011-10-04

申请号：US13041794

申请日：2011-03-07

申请人： Tsung-Ting Tsai ,  Ming-Sheng Lai ,  Min-Feng Chiang ,  Po-Yuan Liu

发明人： Tsung-Ting Tsai ,  Ming-Sheng Lai ,  Min-Feng Chiang ,  Po-Yuan Liu

IPC分类号： G11C19/00

CPC分类号： G11C19/28

摘要： A shift register comprises a plurality of stages, {Sn}, n=1, 2, . . . , N, N being a positive integer. In one embodiment, each stage Sn includes a pull-up circuit having an input for receiving one of a first clock signal, CK1, and a second clock signal, XCK1, an output for responsively outputting an output signal, On, and an input node Qn, a pull-up control circuit electrically coupled to the input node Qn and configured such that when receiving a first input signal, the pull-up control circuit responsively generates a signal that is provided to the input node Qn to turn on the pull-up circuit, a pull-down circuit electrically coupled to the input node Qn and configured to provide a first voltage to one of the input node Qn and the output of the pull-up circuit, and a pull-down control circuit configured to receive one of a third clock signal, CK2, and a fourth clock signal, XCK2, and responsively generate the first voltage to turn on the pull-down circuit of the stage Sn and the pull-down circuit of one of the stage Sn−1 and the stage Sn+1.

摘要翻译： 移位寄存器包括多个级，{Sn}，n = 1,2。 。 。 ，N，N为正整数。 在一个实施例中，每级Sn包括一个上拉电路，该上拉电路具有用于接收第一时钟信号CK1和第二时钟信号XCK1中的一个的输入端，用于响应地输出输出信号的输出端和输入节点 Qn是电耦合到输入节点Qn并被配置为使得当接收到第一输入信号时，上拉控制电路响应地产生提供给输入节点Qn的信号，以接通上拉电路， 电耦合到输入节点Qn并被配置为向输入节点Qn和上拉电路的输出之一提供第一电压的下拉电路，以及被配置为接收一个电压的下拉控制电路 第三时钟信号CK2和第四时钟信号XCK2，并且响应地产生第一电压以接通级Sn的下拉电路和级Sn-1之一的下拉电路和 阶段Sn + 1。

公开(公告)号：US20110007863A1

公开(公告)日：2011-01-13

申请号：US12877748

申请日：2010-09-08

申请人： Tsung-Ting Tsai ,  Ming-Sheng Lai ,  Min-Feng Chiang ,  Po-Yuan Liu

发明人： Tsung-Ting Tsai ,  Ming-Sheng Lai ,  Min-Feng Chiang ,  Po-Yuan Liu

IPC分类号： G11C19/00

CPC分类号： G11C19/28

摘要： A shift register comprises a plurality of stages, {Sn}, n=1, 2, . . . , N, N being a positive integer. In one embodiment, each stage Sn includes a pull-up circuit having an input for receiving one of a first clock signal, CK1, and a second clock signal, XCK1, an output for responsively outputting an output signal, On, and an input node Qn, a pull-up control circuit electrically coupled to the input node Qn and configured such that when receiving a first input signal, the pull-up control circuit responsively generates a signal that is provided to the input node Qn to turn on the pull-up circuit, a pull-down circuit electrically coupled to the input node Qn and configured to provide a first voltage to one of the input node Qn and the output of the pull-up circuit, and a pull-down control circuit configured to receive one of a third clock signal, CK2, and a fourth clock signal, XCK2, and responsively generate the first voltage to turn on the pull-down circuit of the stage Sn and the pull-down circuit of one of the stage Sn−1 and the stage Sn+1.

摘要翻译： 移位寄存器包括多个级，{Sn}，n = 1,2。 。 。 ，N，N为正整数。 在一个实施例中，每级Sn包括一个上拉电路，该上拉电路具有用于接收第一时钟信号CK1和第二时钟信号XCK1中的一个的输入端，用于响应地输出输出信号的输出端和输入节点 Qn是电耦合到输入节点Qn并被配置为使得当接收到第一输入信号时，上拉控制电路响应地产生提供给输入节点Qn的信号，以接通上拉电路， 电耦合到输入节点Qn并被配置为向输入节点Qn和上拉电路的输出之一提供第一电压的下拉电路，以及被配置为接收一个电压的下拉控制电路 第三时钟信号CK2和第四时钟信号XCK2，并且响应地产生第一电压以接通级Sn的下拉电路和级Sn-1之一的下拉电路和 阶段Sn + 1。

公开(公告)号：US20110158376A1

公开(公告)日：2011-06-30

申请号：US13041794

申请日：2011-03-07

申请人： Tsung-Ting Tsai ,  Ming-Sheng Lai ,  Min-Feng Chiang ,  Po-Yuan Liu

发明人： Tsung-Ting Tsai ,  Ming-Sheng Lai ,  Min-Feng Chiang ,  Po-Yuan Liu

IPC分类号： G11C19/34

CPC分类号： G11C19/28

摘要： A shift register comprises a plurality of stages, {Sn}, n=1, 2, . . . , N, N being a positive integer. In one embodiment, each stage Sn includes a pull-up circuit having an input for receiving one of a first clock signal, CK1, and a second clock signal, XCK1, an output for responsively outputting an output signal, On, and an input node Qn, a pull-up control circuit electrically coupled to the input node Qn and configured such that when receiving a first input signal, the pull-up control circuit responsively generates a signal that is provided to the input node Qn to turn on the pull-up circuit, a pull-down circuit electrically coupled to the input node Qn and configured to provide a first voltage to one of the input node Qn and the output of the pull-up circuit, and a pull-down control circuit configured to receive one of a third clock signal, CK2, and a fourth clock signal, XCK2, and responsively generate the first voltage to turn on the pull-down circuit of the stage Sn and the pull-down circuit of one of the stage Sn−1 and the stage Sn+1.

公开(公告)号：US07924967B2

公开(公告)日：2011-04-12

申请号：US12877748

申请日：2010-09-08

申请人： Tsung-Ting Tsai ,  Ming-Sheng Lai ,  Min-Feng Chiang ,  Po-Yuan Liu

发明人： Tsung-Ting Tsai ,  Ming-Sheng Lai ,  Min-Feng Chiang ,  Po-Yuan Liu

IPC分类号： G11C19/00

CPC分类号： G11C19/28

摘要： A shift register comprises a plurality of stages, {Sn}, n=1, 2, . . . , N, N being a positive integer. In one embodiment, each stage Sn includes a pull-up circuit having an input for receiving one of a first clock signal, CK1, and a second clock signal, XCK1, an output for responsively outputting an output signal, On, and an input node Qn, a pull-up control circuit electrically coupled to the input node Qn and configured such that when receiving a first input signal, the pull-up control circuit responsively generates a signal that is provided to the input node Qn to turn on the pull-up circuit, a pull-down circuit electrically coupled to the input node Qn and configured to provide a first voltage to one of the input node Qn and the output of the pull-up circuit, and a pull-down control circuit configured to receive one of a third clock signal, CK2, and a fourth clock signal, XCK2, and responsively generate the first voltage to turn on the pull-down circuit of the stage Sn and the pull-down circuit of one of the stage Sn−1 and the stage Sn+1.

公开(公告)号：US20100315374A1

公开(公告)日：2010-12-16

申请号：US12764095

申请日：2010-04-21

申请人： Tzu-Jung Chen ,  Po-Yuan Liu ,  Min-Feng Chiang ,  Ming-Sheng Lai

发明人： Tzu-Jung Chen ,  Po-Yuan Liu ,  Min-Feng Chiang ,  Ming-Sheng Lai

IPC分类号： G06F3/045

CPC分类号： G06F3/044

摘要： A display device and a method of applying the same are introduced herein. A shielding layer is utilized to interpose between a transparent conductive layer of a touch element and a common electrode layer of a liquid crystal display (LCD) panel. With controlling variances of a first and a second control signals, a coupling current between the transparent conductive layer and common electrode layer can approach none, whereby influences of capacitive coupling effect between the common electrode layer or shielding layer and the transparent conductive layer of the touch element can be reduced. Thus, high touch accuracy of the touch element can be achieved and the noise can be eliminated simultaneously.

摘要翻译： 介绍了显示装置及其应用方法。 屏蔽层用于插入触摸元件的透明导电层和液晶显示器（LCD）面板的公共电极层之间。 利用第一和第二控制信号的控制方差，透明导电层和公共电极层之间的耦合电流可以不接近，由此在公共电极层或屏蔽层与触摸的透明导电层之间的电容耦合效应的影响 元素可以减少。 因此，可以实现触摸元件的高触摸精度并且可以同时消除噪声。

公开(公告)号：US08009158B2

公开(公告)日：2011-08-30

申请号：US12018210

申请日：2008-01-23

申请人： Chi-Wen Chen ,  Min-Feng Chiang ,  Ming-Sheng Lai

发明人： Chi-Wen Chen ,  Min-Feng Chiang ,  Ming-Sheng Lai

IPC分类号： G06F3/038

CPC分类号： G09G3/3406 ,  G09G3/36

摘要： A display device including a liquid crystal display (LCD) panel, a backlight module, and a photo-sensing device is provided. The backlight module is disposed below the LCD panel and is suitable for providing a light source. The photo-sensing device is built in the LCD panel and includes a plurality of photo-sensors having different illumination sensing capabilities. The backlight module modulates the output intensity of the light source according to the sensed result of one of the photo-sensors. Thereby, the display device can precisely modulate the intensity of the back light according to the intensity of ambient light so as to improve the contrast ratio and to reduce the power consumption.

摘要翻译： 提供了包括液晶显示器（LCD）面板，背光模块和光感测装置的显示装置。 背光模块设置在LCD面板的下方，适用于提供光源。 光感测装置内置在LCD面板中，并且包括具有不同照明感测能力的多个光传感器。 背光模块根据其中一个光电传感器的感测结果来调制光源的输出强度。 因此，显示装置可以根据环境光的强度精确地调制背光的强度，以提高对比度并降低功耗。

公开(公告)号：US20090073107A1

公开(公告)日：2009-03-19

申请号：US12018210

申请日：2008-01-23

申请人： Chi-Wen Chen ,  Min-Feng Chiang ,  Ming-Sheng Lai

发明人： Chi-Wen Chen ,  Min-Feng Chiang ,  Ming-Sheng Lai

IPC分类号： G09G3/36 ,  H01L33/00

CPC分类号： G09G3/3406 ,  G09G3/36

摘要： A display device including a liquid crystal display (LCD) panel, a backlight module, and a photo-sensing device is provided. The backlight module is disposed below the LCD panel and is suitable for providing a light source. The photo-sensing device is built in the LCD panel and includes a plurality of photo-sensors having different illumination sensing capabilities. The backlight module modulates the output intensity of the light source according to the sensed result of one of the photo-sensors. Thereby, the display device can precisely modulate the intensity of the back light according to the intensity of ambient light so as to improve the contrast ratio and to reduce the power consumption.

摘要翻译： 提供了包括液晶显示器（LCD）面板，背光模块和光感测装置的显示装置。 背光模块设置在LCD面板的下方，适用于提供光源。 光感测装置内置在LCD面板中，并且包括具有不同照明感测能力的多个光传感器。 背光模块根据其中一个光电传感器的感测结果来调制光源的输出强度。 因此，显示装置可以根据环境光的强度精确地调制背光的强度，以提高对比度并降低功耗。

公开(公告)号：US08340240B2

公开(公告)日：2012-12-25

申请号：US13492916

申请日：2012-06-10

申请人： Tsung-Ting Tsai ,  Ming-Sheng Lai ,  Min-Feng Chiang ,  Chun-Hsin Liu

发明人： Tsung-Ting Tsai ,  Ming-Sheng Lai ,  Min-Feng Chiang ,  Chun-Hsin Liu

IPC分类号： G11C19/00

CPC分类号： G11C19/00 ,  G09G3/3677 ,  G09G2300/0408 ,  G09G2310/0286 ,  G09G2320/0219 ,  G11C19/28

摘要： A shift register includes a plurality of shift register units coupled in series. Each shift register unit, receiving an input voltage at an input end and an output voltage at an output end, includes a node, a pull-up driving circuit, a pull-up circuit and first through third pull-down circuits. The pull-up driving circuit can transmit the input voltage to the node, and the pull-up circuit can provide the output voltage based on a high-frequency clock signal and the input signal. The first pull-down circuit can provide a bias voltage at the node or at the output end based on a first low-frequency clock signal. The second pull-down circuit can provide a bias voltage at the node or at the output end based on a second low-frequency clock signal. The third pull-down circuit can provide a bias voltage at the node or at the output end based on a feedback voltage.

摘要翻译： 移位寄存器包括串联耦合的多个移位寄存器单元。 接收输入端的输入电压和输出端的输出电压的每个移位寄存器单元包括节点，上拉驱动电路，上拉电路和第一至第三下拉电路。 上拉驱动电路可以将输入电压传输到节点，并且上拉电路可以基于高频时钟信号和输入信号提供输出电压。 第一下拉电路可以基于第一低频时钟信号在节点处或在输出端提供偏置电压。 第二下拉电路可以基于第二低频时钟信号在节点处或在输出端提供偏置电压。 第三下拉电路可以基于反馈电压在节点处或输出端提供偏置电压。