利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

224 条记录 (耗时 0.034 秒)

    Method of fabrication of interconnect structures
    1.
    发明授权
    Method of fabrication of interconnect structures 失效
    互连结构的制造方法

    公开(公告)号：US07563710B2

    公开(公告)日：2009-07-21

    申请号：US11860602

    申请日：2007-09-25

    申请人： Chih-Chao Yang ,  Lawrence A. Clevenger ,  Andrew P. Cowley ,  Timothy J. Dalton ,  Meeyoung H. Yoon

    发明人： Chih-Chao Yang ,  Lawrence A. Clevenger ,  Andrew P. Cowley ,  Timothy J. Dalton ,  Meeyoung H. Yoon

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/76849 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/76831 ,  H01L21/76843 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method of forming a damascene wire. The method including: forming a mask layer on a top surface of a dielectric layer; forming an opening in the mask layer; forming a trench in the dielectric layer where the dielectric layer is not protected by the mask layer; recessing the sidewalls of the trench under the mask layer; forming a conformal conductive liner on all exposed surface of the trench and the mask layer; filling the trench with a core electrical conductor; removing portions of the conductive liner extending above the top surface of the dielectric layer and removing the mask layer; and forming a conductive cap on a top surface of the core conductor.

    摘要翻译： 一种形成镶嵌线的方法。 该方法包括：在电介质层的顶表面上形成掩模层; 在掩模层中形成开口; 在电介质层中形成沟槽，其中电介质层不被掩模层保护; 使掩模层下方的沟槽的侧壁凹陷; 在沟槽和掩模层的所有暴露表面上形成共形导电衬垫; 用芯电导体填充沟槽; 去除在电介质层的顶表面上方延伸的导电衬垫的部分，并去除掩模层; 以及在所述芯导体的顶表面上形成导电帽。

    Interconnect structure
    3.
    发明授权
    Interconnect structure 失效
    互连结构

    公开(公告)号：US07598616B2

    公开(公告)日：2009-10-06

    申请号：US12140352

    申请日：2008-06-17

    申请人： Chih-Chao Yang ,  Lawrence A. Clevenger ,  Andrew P. Cowley ,  Timothy J. Dalton ,  Meeyoung H. Yoon

    发明人： Chih-Chao Yang ,  Lawrence A. Clevenger ,  Andrew P. Cowley ,  Timothy J. Dalton ,  Meeyoung H. Yoon

    IPC分类号： H01L29/06 ,  H01L21/4763

    CPC分类号： H01L21/76849 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/76831 ,  H01L21/76843 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A structure. The structure includes: a core electrical conductor having a top surface, an opposite bottom surface and sides between the top and bottom surfaces; an electrically conductive liner in direct physical contact with and covering the bottom surface and the sides of the core electrical conductor, embedded portions of the electrically conductive liner in direct physical contact with and extending over the core electrical conductor in regions of the core electrical conductor adjacent to both the top surface and the sides of the core electrical conductor; and an electrically conductive cap in direct physical contact with the top surface of the core electrical conductor that is exposed between the embedded portions of the electrically conductive liner.

    摘要翻译： 一个结构。 该结构包括：具有顶表面，相对的底表面和顶表面和底表面之间的侧面的芯电导体; 与芯电导体的底表面和侧面直接物理接触并覆盖芯电导体的底表面和侧面的导电衬垫，导电衬垫的嵌入部分与芯电导体相邻的芯电导体的区域中直接物理接触并延伸 到芯电导体的顶表面和侧面; 以及与导电衬里的嵌入部分之间暴露的芯电导体的顶表面直接物理接触的导电帽。

    Interconnect structure and method of fabrication of same
    4.
    发明授权
    Interconnect structure and method of fabrication of same 有权
    互连结构及其制造方法

    公开(公告)号：US07528493B2

    公开(公告)日：2009-05-05

    申请号：US11860590

    申请日：2007-09-25

    申请人： Chih-Chao Yang ,  Lawrence A. Clevenger ,  Andrew P. Cowley ,  Timothy J. Dalton ,  Meeyoung H. Yoon

    发明人： Chih-Chao Yang ,  Lawrence A. Clevenger ,  Andrew P. Cowley ,  Timothy J. Dalton ,  Meeyoung H. Yoon

    IPC分类号： H01L29/06 ,  H01L21/4763

    CPC分类号： H01L21/76849 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/76831 ,  H01L21/76843 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A damascene wire and method of forming the wire. The method including: forming a mask layer on a top surface of a dielectric layer; forming an opening in the mask layer; forming a trench in the dielectric layer where the dielectric layer is not protected by the mask layer; recessing the sidewalls of the trench under the mask layer; forming a conformal conductive liner on all exposed surface of the trench and the mask layer; filling the trench with a core electrical conductor; removing portions of the conductive liner extending above the top surface of the dielectric layer and removing the mask layer; and forming a conductive cap on a top surface of the core conductor. The structure includes a core conductor clad in a conductive liner and a conductive capping layer in contact with the top surface of the core conductor that is not covered by the conductive liner.

    摘要翻译： 一种镶嵌线及其形成方法。 该方法包括：在电介质层的顶表面上形成掩模层; 在掩模层中形成开口; 在电介质层中形成沟槽，其中电介质层不被掩模层保护; 使掩模层下方的沟槽的侧壁凹陷; 在沟槽和掩模层的所有暴露表面上形成共形导电衬垫; 用芯电导体填充沟槽; 去除在电介质层的顶表面上方延伸的导电衬垫的部分，并去除掩模层; 以及在所述芯导体的顶表面上形成导电帽。 该结构包括包覆在导电衬垫中的芯导体和与未被导电衬垫覆盖的芯导体的顶表面接触的导电覆盖层。

    Interconnect structure and method of fabrication of same
    5.
    发明授权
    Interconnect structure and method of fabrication of same 失效
    互连结构及其制造方法

    公开(公告)号：US07335588B2

    公开(公告)日：2008-02-26

    申请号：US11107074

    申请日：2005-04-15

    申请人： Chih-Chao Yang ,  Lawrence A. Clevenger ,  Andrew P. Cowley ,  Timothy J. Dalton ,  Meeyoung H. Yoon

    发明人： Chih-Chao Yang ,  Lawrence A. Clevenger ,  Andrew P. Cowley ,  Timothy J. Dalton ,  Meeyoung H. Yoon

    IPC分类号： H01L24/4763

    CPC分类号： H01L21/76849 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/76831 ,  H01L21/76843 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A damascene wire and method of forming the wire. The method including: forming a mask layer on a top surface of a dielectric layer; forming an opening in the mask layer; forming a trench in the dielectric layer where the dielectric layer is not protected by the mask layer; recessing the sidewalls of the trench under the mask layer; forming a conformal conductive liner on all exposed surface of the trench and the mask layer; filling the trench with a core electrical conductor; removing portions of the conductive liner extending above the top surface of the dielectric layer and removing the mask layer; and forming a conductive cap on a top surface of the core conductor. The structure includes a core conductor clad in a conductive liner and a conductive capping layer in contact with the top surface of the core conductor that is not covered by the conductive liner.

    摘要翻译： 一种镶嵌线及其形成方法。 该方法包括：在电介质层的顶表面上形成掩模层; 在掩模层中形成开口; 在电介质层中形成沟槽，其中电介质层不被掩模层保护; 使掩模层下方的沟槽的侧壁凹陷; 在沟槽和掩模层的所有暴露表面上形成共形导电衬垫; 用芯电导体填充沟槽; 去除在电介质层的顶表面上方延伸的导电衬垫的部分，并去除掩模层; 以及在所述芯导体的顶表面上形成导电帽。 该结构包括包覆在导电衬垫中的芯导体和与未被导电衬垫覆盖的芯导体的顶表面接触的导电覆盖层。