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    Fuse and integrated conductor
    1.
    发明授权
    Fuse and integrated conductor 有权
    保险丝和集成导体

    公开(公告)号：US08836124B2

    公开(公告)日：2014-09-16

    申请号：US13414742

    申请日：2012-03-08

    申请人： Griselda Bonilla ,  Kaushik Chanda ,  Samuel Sung Shik Choi ,  Ronald G. Filippi ,  Stephan Grunow ,  Naftali Eliahu Lustig ,  Andrew H. Simon

    发明人： Griselda Bonilla ,  Kaushik Chanda ,  Samuel Sung Shik Choi ,  Ronald G. Filippi ,  Stephan Grunow ,  Naftali Eliahu Lustig ,  Andrew H. Simon

    IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

    CPC分类号： H01L23/5256 ,  H01L23/53233 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A fuse structure includes within an aperture within a dielectric layer located over a substrate that exposes a conductor contact layer within the substrate a seed layer interposed between the conductor contact layer and another conductor layer. The seed layer includes a doped copper material that includes a dopant immobilized predominantly within the seed layer. The fuse structure may be severed while not severing a conductor interconnect structure also located over the substrate that exposes a second conductor contact layer within a second aperture. In contrast with the fuse structure that includes the doped seed layer having the immobilized dopant, the interconnect structure includes a doped seed layer having a mobile dopant.

    摘要翻译： 熔丝结构包括在位于衬底之上的电介质层内的孔内，孔暴露在衬底内的导体接触层，介于导体接触层和另一导体层之间的晶种层。 种子层包括掺杂的铜材料，其包括主要在种子层内固定的掺杂剂。 可以切断熔丝结构，同时不切断也位于衬底上的导体互连结构，所述导体互连结构在第二孔内暴露第二导体接触层。 与包括具有固定化掺杂剂的掺杂种子层的熔丝结构相反，互连结构包括具有可移动掺杂剂的掺杂种子层。

    Electrically programmable fuse and fabrication method
    3.
    发明授权
    Electrically programmable fuse and fabrication method 有权
    电可编程保险丝和制造方法

    公开(公告)号：US08378447B2

    公开(公告)日：2013-02-19

    申请号：US13085632

    申请日：2011-04-13

    申请人： Kaushik Chanda ,  Ronald G. Filippi ,  Joseph M. Lukaitis ,  Ping-Chuan Wang

    发明人： Kaushik Chanda ,  Ronald G. Filippi ,  Joseph M. Lukaitis ,  Ping-Chuan Wang

    IPC分类号： H01L23/52

    CPC分类号： H01L23/5256 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An electrically programmable fuse includes an anode, a cathode, and a fuse link conductively connecting the cathode with the anode, which is programmable by applying a programming current. The anode and the fuse link each include a polysilicon layer and a silicide layer formed on the polysilicon layer, and the cathode includes the polysilicon layer and a partial silicide layer formed on a predetermined portion of the polysilicon layer of the cathode located adjacent to a cathode junction where the cathode and the fuse link meet.

    摘要翻译： 电可编程保险丝包括阳极，阴极和导电地连接阴极与阳极的熔断体，其可通过施加编程电流来编程。 阳极和熔丝链路各自包括形成在多晶硅层上的多晶硅层和硅化物层，并且阴极包括多晶硅层和形成在阴极的多晶硅层的预定部分上的部分硅化物层，其位于阴极附近 阴极和熔断体连接处的连接处。

    Test structure for electromigration analysis and related method
    9.
    发明授权
    Test structure for electromigration analysis and related method 失效
    电迁移分析测试结构及相关方法

    公开(公告)号：US07683651B2

    公开(公告)日：2010-03-23

    申请号：US12348434

    申请日：2009-01-05

    申请人： Kaushik Chanda ,  Ronald G. Filippi ,  Ping-Chuan Wang

    发明人： Kaushik Chanda ,  Ronald G. Filippi ,  Ping-Chuan Wang

    IPC分类号： G01R31/26 ,  G01R19/00 ,  H01L23/58

    CPC分类号： G01R31/2858

    摘要： A test structure for electromigration and related method are disclosed. The test structure may include an array of a plurality of multilink test sets, each multilink test set including a plurality of metal lines positioned within a dielectric material and connected in a serial configuration; each multilink test set being connected in a parallel configuration with the other multilink test sets, the parallel configuration including a first electrical connection to a cathode end of a first metal line in each multilink test set and a second electrical connection to an anode end of a last metal line in each multilink test set.

    摘要翻译： 公开了用于电迁移的测试结构及相关方法。 测试结构可以包括多个多链测试集的阵列，每个多链测试集包括定位在电介质材料内并以串联配置连接的多个金属线; 每个多链路测试集合以与其他多链路测试集合的并行配置连接，所述并行配置包括到每个多链路测试集合中的第一金属线的阴极端的第一电连接和到第一金属线的阳极端的第二电连接 每条多链测试集中的最后一条金属线。

    RELIABILITY OF WIDE INTERCONNECTS
    10.
    发明申请
    RELIABILITY OF WIDE INTERCONNECTS 失效
    宽互联的可靠性

    公开(公告)号：US20100038790A1

    公开(公告)日：2010-02-18

    申请号：US12191534

    申请日：2008-08-14

    申请人： Griselda Bonilla ,  Kaushik Chanda ,  Ronald G. Filippi ,  Stephan Grunow ,  Sujatha Sankaran ,  Andrew H. Simon ,  Theodorus Eduardus Standaert

    发明人： Griselda Bonilla ,  Kaushik Chanda ,  Ronald G. Filippi ,  Stephan Grunow ,  Sujatha Sankaran ,  Andrew H. Simon ,  Theodorus Eduardus Standaert

    IPC分类号： H01L23/48 ,  H01L21/4763

    CPC分类号： H01L21/76816 ,  H01L21/76805 ,  H01L23/5226 ,  H01L23/528 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An integrated circuit which includes a semiconductor substrate, a first metal wiring level on the semiconductor substrate which includes metal wiring lines, an interconnect wiring level on the first metal wiring level which includes a via interconnect within an interlevel dielectric, a second metal wiring level on the interconnect wiring level which includes metal wiring lines, at least one metal wiring line having a plurality of dielectric fill shapes that reduces the cross sectional area of the at least one metal wiring line, and wherein the via interconnect makes electrical contact between a metal line in the first wiring level and the at least one metal wiring line in the second wiring level, the via interconnect being adjacent to and spaced from the plurality of dielectric fill shapes. Also disclosed is a method in which a plurality of dielectric fill shapes are placed adjacent to and spaced from a via contact area in a wiring line in a second wiring level.

    摘要翻译： 一种集成电路，其包括半导体衬底，所述半导体衬底上的包括金属布线的第一金属布线级别，所述第一金属布线层上的互连布线级别，其包括层间电介质内的通孔布线，第二金属布线级别 包括金属布线的互连布线层，至少一个具有多个介电填充形状的金属布线，其减小了所述至少一个金属布线的横截面积，并且其中所述通孔互连使金属线 在第一布线级别和第二布线级中的至少一个金属布线中，通孔布线与多个介质填充形状相邻并间隔开。 还公开了一种方法，其中多个介电填充形状被放置成与第二布线层中的布线中的通孔接触区域相邻并间隔开。