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13 条记录 (耗时 0.025 秒)

    DETECTION OF BAD CLOCK CONDITIONS
    2.
    发明申请
    DETECTION OF BAD CLOCK CONDITIONS 有权
    检测时钟条件

    公开(公告)号：US20140043064A1

    公开(公告)日：2014-02-13

    申请号：US14060436

    申请日：2013-10-22

    申请人： Mark Trimmer

    发明人： Mark Trimmer

    IPC分类号： H03K5/19 ,  G06F1/14

    CPC分类号： H03K5/19 ,  G06F1/14 ,  H03K5/26

    摘要： There is provided a circuit and method for detecting a bad clock condition on a clock signal that includes sampling the value of the clock signal at a first plurality of time delays following a rising edge on the clock signal. This method also includes sampling the value of the clock signal at a second plurality of time delays following a falling edge on the clock signal.

    摘要翻译： 提供了一种用于检测时钟信号上的不良时钟状况的电路和方法，该时钟信号包括在时钟信号的上升沿之后的第一多个时间延迟上对时钟信号的值进行采样。 该方法还包括在时钟信号的下降沿之后的第二多个时间延迟中对时钟信号的值进行采样。

    Method to detect clock tampering
    3.
    发明授权
    Method to detect clock tampering 有权
    检测时钟篡改的方法

    公开(公告)号：US08762764B2

    公开(公告)日：2014-06-24

    申请号：US12985011

    申请日：2011-01-05

    申请人： Mark Trimmer

    发明人： Mark Trimmer

    IPC分类号： G06F1/00

    CPC分类号： G01R31/31727

    摘要： This invention relates to a method of receiving a first potentially unreliable clock signal having a first frequency; receiving a second reliable clock signal having a second frequency; wherein the first frequency and the second frequency have an expected relationship; determining whether the first potentially unreliable clock signal has changed with respect to the second reliable clock signal by: determining an actual relationship between the first potentially unreliable frequency and the second reliable frequency; and generating an alarm signal if the actual relationship is different to the expected relationship.

    摘要翻译： 本发明涉及一种接收具有第一频率的第一潜在不可靠时钟信号的方法; 接收具有第二频率的第二可靠时钟信号; 其中所述第一频率和所述第二频率具有期望的关系; 通过以下方式确定所述第一可潜在不可靠时钟信号是否相对于所述第二可靠时钟信号改变：确定所述第一可潜在不可靠频率与所述第二可靠频率之间的实际关系; 并且如果实际关系与期望的关系不同，则产生报警信号。

    METHOD TO DETECT CLOCK TAMPERING
    4.
    发明申请
    METHOD TO DETECT CLOCK TAMPERING 有权
    检测时钟保护的方法

    公开(公告)号：US20110163736A1

    公开(公告)日：2011-07-07

    申请号：US12985011

    申请日：2011-01-05

    申请人： Mark Trimmer

    发明人： Mark Trimmer

    IPC分类号： G01R23/14

    CPC分类号： G01R31/31727

    摘要： This invention relates to a method of receiving a first potentially unreliable clock signal having a first frequency; receiving a second reliable clock signal having a second frequency; wherein the first frequency and the second frequency have an expected relationship; determining whether the first potentially unreliable clock signal has changed with respect to the second reliable clock signal by: determining an actual relationship between the first potentially unreliable frequency and the second reliable frequency; and generating an alarm signal if the actual relationship is different to the expected relationship.

    摘要翻译： 本发明涉及一种接收具有第一频率的第一潜在不可靠时钟信号的方法; 接收具有第二频率的第二可靠时钟信号; 其中所述第一频率和所述第二频率具有期望的关系; 通过以下方式确定所述第一可潜在不可靠时钟信号是否相对于所述第二可靠时钟信号改变：确定所述第一可潜在不可靠频率与所述第二可靠频率之间的实际关系; 并且如果实际关系与期望的关系不同，则产生报警信号。

    DETECTION OF BAD CLOCK CONDITIONS
    5.
    发明申请
    DETECTION OF BAD CLOCK CONDITIONS 有权
    检测时钟条件

    公开(公告)号：US20100327913A1

    公开(公告)日：2010-12-30

    申请号：US12822881

    申请日：2010-06-24

    申请人： Mark Trimmer

    发明人： Mark Trimmer

    IPC分类号： H03K5/19

    CPC分类号： H03K5/19 ,  G06F1/14 ,  H03K5/26

    摘要： There is provided a circuit and method for detecting a bad clock condition on a clock signal that includes sampling the value of the clock signal at a first plurality of time delays following a rising edge on the clock signal. This method also includes sampling the value of the clock signal at a second plurality of time delays following a falling edge on the clock signal.

    摘要翻译： 提供了一种用于检测时钟信号上的不良时钟状况的电路和方法，该时钟信号包括在时钟信号的上升沿之后的第一多个时间延迟上对时钟信号的值进行采样。 该方法还包括在时钟信号的下降沿之后的第二多个时间延迟中对时钟信号的值进行采样。

    Secured access device with chip card application
    6.
    发明授权
    Secured access device with chip card application 有权
    具有芯片卡应用的安全接入设备

    公开(公告)号：US06776346B1

    公开(公告)日：2004-08-17

    申请号：US09914315

    申请日：2001-08-24

    申请人： Jacques Sonzogni ,  Mark Trimmer

    发明人： Jacques Sonzogni ,  Mark Trimmer

    IPC分类号： G06K1906

    CPC分类号： G07F7/1008 ,  G06Q20/341 ,  G06Q20/35765

    摘要： Disclosed is a device for secured access to applications of a chip card, bringing into operation instructions that provide information, at each point in time, on the rights, especially in terms of access to the chip card, of a software component or a hardware action performed in the chip card. In the case of each new software component and at each new hardware action, a register R of the microprocessor of the chip card stores a specific code that makes it possible to check the authorized nature of the operations of access to the memory of the chip card that are performed by the new software component or hardware action.

    摘要翻译： 公开了一种用于安全地访问芯片卡的应用的设备，其使得在每个时间点提供关于软件组件或硬件动作的权限特别是访问芯片卡的权利的信息的指令 在芯片卡中执行。 在每个新的软件组件的情况下，并且在每个新的硬件动作中，芯片卡的微处理器的寄存器R存储一个特定代码，使得可以检查访问芯片卡的存储器的操作的授权性质 由新的软件组件或硬件操作执行。

    Detection of bad clock conditions
    7.
    发明授权
    Detection of bad clock conditions 有权
    检测不良时钟条件

    公开(公告)号：US08564333B2

    公开(公告)日：2013-10-22

    申请号：US12822881

    申请日：2010-06-24

    申请人： Mark Trimmer

    发明人： Mark Trimmer

    IPC分类号： H03K5/19

    CPC分类号： H03K5/19 ,  G06F1/14 ,  H03K5/26

    摘要： There is provided a circuit and method for detecting a bad clock condition on a clock signal that includes sampling the value of the clock signal at a first plurality of time delays following a rising edge on the clock signal. This method also includes sampling the value of the clock signal at a second plurality of time delays following a falling edge on the clock signal.

    摘要翻译： 提供了一种用于检测时钟信号上的不良时钟状况的电路和方法，该时钟信号包括在时钟信号的上升沿之后的第一多个时间延迟上对时钟信号的值进行采样。 该方法还包括在时钟信号的下降沿之后的第二多个时间延迟中对时钟信号的值进行采样。

    DETECTING KEY CORRUPTION
    8.
    发明申请
    DETECTING KEY CORRUPTION 有权
    检测关键的腐蚀

    公开(公告)号：US20120148047A1

    公开(公告)日：2012-06-14

    申请号：US13325139

    申请日：2011-12-14

    申请人： Mark Trimmer

    发明人： Mark Trimmer

    IPC分类号： H04L9/06

    CPC分类号： G06F21/64 ,  G06F11/10 ,  G06F12/16 ,  G06F21/72 ,  G06F21/79 ,  H04L9/06

    摘要： Corruption in a key stored in a memory is detected by reading a key from a key memory and determining if detection bits of the key read from the key memory correspond to an expected value. The expected value is a value of the detection bits of the key when the key is written to the key memory.

    摘要翻译： 通过从密钥存储器读取密钥并确定从密钥存储器读取的密钥的检测位是否对应于预期值来检测存储在存储器中的密钥的损坏。 期望值是当键被写入密钥存储器时密钥的检测位的值。