公开(公告)号：US08838691B2

公开(公告)日：2014-09-16

申请号：US13537917

申请日：2012-06-29

申请人： Chuan Liu ,  Hang Xiao ,  Ming Yan ,  Jean X. Yu

发明人： Chuan Liu ,  Hang Xiao ,  Ming Yan ,  Jean X. Yu

IPC分类号： G06F15/16

CPC分类号： G06F15/16 ,  H04L67/02 ,  H04L69/04

摘要： A mechanism is provided in a data processing system for de-duplication in a Web services environment. Responsive to receiving a signature for a portion of a request message from a client, the mechanism performs a query in a bit stream repository to determine whether the portion of the request message has been previously received. Responsive to determining the portion of the message has been previously received, the mechanism retrieves the portion of the message from the bit stream repository. The mechanism notifies the client that the portion of the message has been previously received such that the client does not send the portion of the message.

摘要翻译： 在Web服务环境中用于重复数据删除的数据处理系统中提供了一种机制。 响应于从客户端接收请求消息的一部分的签名，该机制在位流存储库中执行查询以确定请求消息的部分是否已经被先前接收。 先前已经接收到响应于确定消息的部分，机制从比特流存储库中检索消息的一部分。 该机制通知客户消息的部分已经被先前接收到，使得客户端不发送消息的该部分。

公开(公告)号：US20140006498A1

公开(公告)日：2014-01-02

申请号：US13537917

申请日：2012-06-29

申请人： Chuan Liu ,  Hang Xiao ,  Ming Yan ,  Jean X. Yu

发明人： Chuan Liu ,  Hang Xiao ,  Ming Yan ,  Jean X. Yu

IPC分类号： G06F15/16

CPC分类号： G06F15/16 ,  H04L67/02 ,  H04L69/04

摘要： A mechanism is provided in a data processing system for de-duplication in a Web services environment. Responsive to receiving a signature for a portion of a request message from a client, the mechanism performs a query in a bit stream repository to determine whether the portion of the request message has been previously received. Responsive to determining the portion of the message has been previously received, the mechanism retrieves the portion of the message from the bit stream repository. The mechanism notifies the client that the portion of the message has been previously received such that the client does not send the portion of the message.

摘要翻译： 在Web服务环境中用于重复数据删除的数据处理系统中提供了一种机制。 响应于从客户端接收请求消息的一部分的签名，该机制在位流存储库中执行查询以确定请求消息的部分是否已经被先前接收。 先前已经接收到响应于确定消息的部分，机制从比特流存储库中检索消息的一部分。 该机制通知客户消息的部分已经被先前接收到，使得客户端不发送消息的该部分。

公开(公告)号：US08010868B2

公开(公告)日：2011-08-30

申请号：US11889152

申请日：2007-08-09

申请人： Pao-Ching Tseng ,  Shu-Fang Tsai ,  Chuan Liu

发明人： Pao-Ching Tseng ,  Shu-Fang Tsai ,  Chuan Liu

IPC分类号： H03M13/00

CPC分类号： H04L1/0061 ,  G06F11/1004 ,  G11B20/18 ,  G11B2020/1843 ,  G11B2220/2516 ,  H04L1/18

摘要： A method for processing noise interference in a serial AT Attachment (SATA) interface. The method includes the steps of detecting whether there is an error in CRC (Cyclic Redundancy Check) checksum or whether an R_ERR primitive (reception error primitive) is received, detecting whether a FIS (Frame Information Structure) is a data type if there is any error and returning back to error state detecting step if there is no any error, detecting whether the FIS is a ATAPI packet command CDB (Command Descriptor Block) when the FIS is the data format, and writing a special tag to the CDB and returning back to the error detecting step.

摘要翻译： 一种用于处理串行AT附件（SATA）接口中噪声干扰的方法。 该方法包括以下步骤：检测CRC（循环冗余校验）校验和是否接收到R_ERR原语（接收错误原语）是否存在错误，检测FIS（帧信息结构）是否为数据类型，如果有 错误，如果没有任何错误，返回到错误状态检测步骤，当FIS是数据格式时，检测FIS是否是ATAPI包命令CDB（命令描述符块），并将特殊标签写入CDB并返回 到错误检测步骤。

公开(公告)号：US20090168943A1

公开(公告)日：2009-07-02

申请号：US12328819

申请日：2008-12-05

申请人： Kuan-Hua Chao ,  Chuan Liu ,  Tse-Hsiang Hsu

发明人： Kuan-Hua Chao ,  Chuan Liu ,  Tse-Hsiang Hsu

IPC分类号： H04L7/00

CPC分类号： H03L7/07

摘要： A clock generation device provided for a transmitter is provided and comprises a clock generator, a calculator and a first phase locked loop (PLL) circuit. The clock generator generates a first clock signal. The calculator calculates a frequency difference between the first and second clock signals. The first PLL circuit generates an output clock signal according to a first reference clock signal related to the first clock signal, and a frequency of the output clock signal is changed according to the frequency difference. The transmitter transmits data according to the output clock signal.

摘要翻译： 提供了一种用于发射机的时钟发生装置，包括时钟发生器，计算器和第一锁相环（PLL）电路。 时钟发生器产生第一个时钟信号。 计算器计算第一和第二时钟信号之间的频率差。 第一PLL电路根据与第一时钟信号相关的第一参考时钟信号产生输出时钟信号，并且输出时钟信号的频率根据频率差而改变。 发射机根据输出时钟信号发送数据。

公开(公告)号：US20080256402A1

公开(公告)日：2008-10-16

申请号：US12144309

申请日：2008-06-23

申请人： Pao-Ching TSENG ,  Shu-Fang Tsai ,  Chuan Liu

发明人： Pao-Ching TSENG ,  Shu-Fang Tsai ,  Chuan Liu

IPC分类号： G06F11/00

CPC分类号： H04L1/0001 ,  H04L25/49

摘要： A method and circuit for reducing SATA (Serial Advanced Technology Attachment) transmission data errors by adjusting the period of sending two consecutive ALIGN Primitives. The method reads a counting value of an 8b/10b coding error counter at a predetermined period and adjusts the period of sending two consecutive ALIGN Primitives according to the counting value. Because the system dynamically adjusts the period of sending two consecutive ALIGN Primitives according to the channel condition, the SATA transmission data errors can be reduced.

摘要翻译： 通过调整发送两个连续的ALIGN原语的周期来减少SATA（串行高级技术附件）传输数据错误的方法和电路。 该方法以预定周期读取8b / 10b编码错误计数器的计数值，并根据计数值调整发送两个连续的ALIGN原语的周期。 由于系统根据通道条件动态调整发送两个连续ALIGN原语的周期，因此可以减少SATA传输数据的错误。

公开(公告)号：US07272673B2

公开(公告)日：2007-09-18

申请号：US11163899

申请日：2005-11-03

申请人： Chuan Liu ,  Chuan-Cheng Hsiao ,  Jeng-Horng Tsai

发明人： Chuan Liu ,  Chuan-Cheng Hsiao ,  Jeng-Horng Tsai

IPC分类号： G06F3/00

CPC分类号： G06F13/385

摘要： A signal generating system for generating a validation signal includes: a phase lock loop (PLL) for locking an output clock to a specific clock frequency; and a digital signal generation circuit. The digital signal generating circuit includes: a triggering circuit, electrically coupled to the PLL, for determining whether the output clock of the PLL is in a frequency range, and outputting a triggering signal if the output clock is in a frequency range; and a signal generating device, electrically coupled to the triggering circuit and the PLL, for generating the validation signal according to the output clock when receiving the triggering signal; wherein before the output clock is in the frequency range, the PLL continuously outputs the output clock.

摘要翻译： 用于产生确认信号的信号发生系统包括：用于将输出时钟锁定到特定时钟频率的锁相环（PLL）; 和数字信号发生电路。 数字信号发生电路包括：电耦合到PLL的用于确定PLL的输出时钟是否在频率范围内的触发电路，以及如果输出时钟在频率范围内则输出触发信号; 以及信号发生装置，电耦合到所述触发电路和所述PLL，用于当接收到所述触发信号时根据所述输出时钟产生所述有效信号; 其中在输出时钟处于频率范围之前，PLL连续输出输出时钟。

公开(公告)号：US20050240855A1

公开(公告)日：2005-10-27

申请号：US11039948

申请日：2005-01-24

申请人： Pao-Ching Tseng ,  Shu-Fang Tsai ,  Chuan Liu

发明人： Pao-Ching Tseng ,  Shu-Fang Tsai ,  Chuan Liu

IPC分类号： H03M13/00

CPC分类号： H04L1/0061 ,  G06F11/1004 ,  G11B20/18 ,  G11B2020/1843 ,  G11B2220/2516 ,  H04L1/18

摘要： A method for processing noise interference in a serial AT Attachment (SATA) interface. The method includes the steps of detecting whether there is an error in CRC (Cyclic Redundancy Check) checksum or whether an R_ERR primitive (reception error primitive) is received, detecting whether a FIS (Frame Information Structure) is a data type if there is any error and returning back to error state detecting step if there is no any error, detecting whether the FIS is a ATAPI packet command CDB (Command Descriptor Block) when the FIS is the data format, and writing a special tag to the CDB and returning back to the error detecting step.

摘要翻译： 一种用于处理串行AT附件（SATA）接口中噪声干扰的方法。 该方法包括以下步骤：检测CRC（循环冗余校验）校验和是否接收到R_ERR原语（接收错误原语）是否存在错误，检测FIS（帧信息结构）是否为数据类型，如果有 错误，如果没有任何错误，返回到错误状态检测步骤，当FIS是数据格式时，检测FIS是否是ATAPI包命令CDB（命令描述符块），并将特殊标签写入CDB并返回 到错误检测步骤。

公开(公告)号：US08619938B2

公开(公告)日：2013-12-31

申请号：US12328819

申请日：2008-12-05

申请人： Kuan-Hua Chao ,  Chuan Liu ,  Tse-Hsiang Hsu

发明人： Kuan-Hua Chao ,  Chuan Liu ,  Tse-Hsiang Hsu

IPC分类号： H04L7/00

CPC分类号： H03L7/07

摘要： A clock generation device provided for a transmitter is provided and comprises a clock generator, a calculator and a first phase locked loop (PLL) circuit. The clock generator generates a first clock signal. The calculator calculates a frequency difference between the first and second clock signals. The first PLL circuit generates an output clock signal according to a first reference clock signal related to the first clock signal, and a frequency of the output clock signal is changed according to the frequency difference. The transmitter transmits data according to the output clock signal.

摘要翻译： 提供了一种用于发射机的时钟发生装置，包括时钟发生器，计算器和第一锁相环（PLL）电路。 时钟发生器产生第一个时钟信号。 计算器计算第一和第二时钟信号之间的频率差。 第一PLL电路根据与第一时钟信号相关的第一参考时钟信号产生输出时钟信号，并且输出时钟信号的频率根据频率差而改变。 发射机根据输出时钟信号发送数据。

公开(公告)号：US20130094659A1

公开(公告)日：2013-04-18

申请号：US13259702

申请日：2010-11-17

申请人： Chuan Liu

发明人： Chuan Liu

IPC分类号： H04R1/10

CPC分类号： H04R1/10 ,  G11C7/16 ,  H03K17/78 ,  H03K17/94 ,  H04R1/1041 ,  H04R5/033

摘要： The invention discloses a music-playing control method and a music playing terminal. The method comprises the following steps: optical-proximity inductive sensors in the earphone sense there is an object within their effective induction ranges, and trigger the earphone to send control signals to a music playing terminal, wherein the control signals are used for indicating the optical-proximity inductive sensors that have sensed the objects; the music playing terminal determines the motion trail of the object within a preset time period according to the received control signals and the time of receiving the control signals and executes control instructions corresponding to the motion trail. Through the invention, the music-playing control becomes simple and convenient, and the user experience is improved.

摘要翻译： 本发明公开了一种音乐播放控制方法和音乐播放终端。 该方法包括以下步骤：耳机中的光接近感应传感器在其有效感应范围内存在一个物体，并触发耳机向音乐播放终端发送控制信号，其中控制信号用于指示光学 感测物体的接近感应传感器; 音乐播放终端根据接收到的控制信号和接收到控制信号的时间在预设时间段内确定对象的运动轨迹，并执行与运动轨迹相对应的控制指令。 通过本发明，音乐播放控制变得简单方便，提高了用户体验。

公开(公告)号：US08214716B2

公开(公告)日：2012-07-03

申请号：US12574891

申请日：2009-10-07

申请人： Pao-Ching Tseng ,  Shu-Fang Tsai ,  Chuan Liu

发明人： Pao-Ching Tseng ,  Shu-Fang Tsai ,  Chuan Liu

IPC分类号： H03M13/00

CPC分类号： G06F13/387 ,  H04L1/16

摘要： A method for processing noise interference in a serial advanced technology attachment (SATA) interface. In the method, when a receiver does not receive a SOF primitive (start of frame primitive) but does receive an EOF primitive (end of frame primitive) or WTRM primitive (wait for frame termination primitive), the receiver outputs a R_ERR primitive (reception error primitive) to enable a transmitter to resend original data and thus to eliminate the interference. In addition, if the transmitter detects an error during the data transmission, a HOLD primitive (hold data transmission primitive) will be issued to temporarily stop the data transmission.

摘要翻译： 一种在串行高级技术附件（SATA）接口中处理噪声干扰的方法。 在该方法中，当接收机未接收到SOF原语（帧原语开始），但是接收到EOF原语（帧原语结束）或WTRM原语（等待帧终止原语）时，接收机输出R_ERR原语（接收 错误原语），以使发射机重新发送原始数据，从而消除干扰。 另外，如果发送器在数据传输期间检测到错误，则将发出HOLD原语（保持数据传输原语）以暂时停止数据传输。