公开(公告)号：US08569846B2

公开(公告)日：2013-10-29

申请号：US13166481

申请日：2011-06-22

申请人： Chun-Chieh Lin ,  Wei-Hua Hsu ,  Yu-En Percy Chang ,  Chung Li Chang ,  Chi-Feng Cheng ,  Win Hung ,  Kishimoto Ko

发明人： Chun-Chieh Lin ,  Wei-Hua Hsu ,  Yu-En Percy Chang ,  Chung Li Chang ,  Chi-Feng Cheng ,  Win Hung ,  Kishimoto Ko

IPC分类号： H01L29/78

CPC分类号： H01L29/665 ,  H01L29/165 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7833 ,  H01L29/7848

摘要： A method includes forming a gate stack over a semiconductor substrate, and forming a first silicon germanium (SiGe) region in the semiconductor substrate and adjacent the gate stack. The first SiGe region has a first atomic percentage of germanium to germanium and silicon. A second SiGe region is formed over the first SiGe region. The second SiGe region has a second atomic percentage of germanium to germanium and silicon. The second atomic percentage is lower than the first atomic percentage, wherein the first and the second SiGe regions form a source/drain stressor of a metal-oxide-semiconductor (MOS) device.

摘要翻译： 一种方法包括在半导体衬底上形成栅叠层，并在半导体衬底中形成第一硅锗（SiGe）区，并邻近栅叠。 第一个SiGe区域具有锗与锗和硅的第一原子百分比。 在第一SiGe区域上形成第二SiGe区域。 第二SiGe区域具有锗与锗和硅的第二原子百分比。 第二原子百分比低于第一原子百分比，其中第一和第二SiGe区域形成金属氧化物半导体（MOS）器件的源极/漏极应力源。

公开(公告)号：US20080265256A1

公开(公告)日：2008-10-30

申请号：US11796369

申请日：2007-04-27

申请人： Chun-Chieh Lin ,  Wei-Hua Hsu ,  Yu-En Percy Chang ,  Chung Li Chang ,  Chi-Feng Cheng ,  Win Hung ,  Kishimoto Ko

发明人： Chun-Chieh Lin ,  Wei-Hua Hsu ,  Yu-En Percy Chang ,  Chung Li Chang ,  Chi-Feng Cheng ,  Win Hung ,  Kishimoto Ko

IPC分类号： H01L29/94

CPC分类号： H01L29/665 ,  H01L29/165 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7833 ,  H01L29/7848

摘要： A semiconductor structure and methods for forming the same are provided. The semiconductor structure includes a semiconductor substrate; a gate stack on the semiconductor substrate; a SiGe region in the semiconductor substrate and adjacent the gate stack, wherein the SiGe region has a first atomic percentage of germanium to germanium and silicon; and a silicide region over the SiGe region. The silicide region has a second atomic percentage of germanium to germanium and silicon. The second atomic percentage is substantially lower than the first atomic percentage.

摘要翻译： 提供半导体结构及其形成方法。 半导体结构包括半导体衬底; 半导体衬底上的栅极堆叠; SiGe区域，其中SiGe区域具有锗到锗和硅的第一原子百分比; 以及SiGe区域上的硅化物区域。 硅化物区域具有锗与锗和硅的第二原子百分比。 第二原子百分比基本上低于第一原子百分数。

公开(公告)号：US20110256681A1

公开(公告)日：2011-10-20

申请号：US13166481

申请日：2011-06-22

申请人： Chun-Chieh Lin ,  Wei-Hua Hsu ,  Yu-En Percy Chang ,  Chung Li Chang ,  Chi-Feng Cheng ,  Win Hung ,  Kishimoto Ko

发明人： Chun-Chieh Lin ,  Wei-Hua Hsu ,  Yu-En Percy Chang ,  Chung Li Chang ,  Chi-Feng Cheng ,  Win Hung ,  Kishimoto Ko

IPC分类号： H01L21/336

CPC分类号： H01L29/665 ,  H01L29/165 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7833 ,  H01L29/7848

摘要： A method includes forming a gate stack over a semiconductor substrate, and forming a first silicon germanium (SiGe) region in the semiconductor substrate and adjacent the gate stack. The first SiGe region has a first atomic percentage of germanium to germanium and silicon. A second SiGe region is formed over the first SiGe region. The second SiGe region has a second atomic percentage of germanium to germanium and silicon. The second atomic percentage is lower than the first atomic percentage, wherein the first and the second SiGe regions form a source/drain stressor of a metal-oxide-semiconductor (MOS) device.

摘要翻译： 一种方法包括在半导体衬底上形成栅叠层，并在半导体衬底中形成第一硅锗（SiGe）区，并邻近栅叠。 第一个SiGe区域具有锗与锗和硅的第一原子百分比。 在第一SiGe区域上形成第二SiGe区域。 第二SiGe区域具有锗与锗和硅的第二原子百分比。 第二原子百分比低于第一原子百分比，其中第一和第二SiGe区域形成金属氧化物半导体（MOS）器件的源极/漏极应力源。

公开(公告)号：US07989901B2

公开(公告)日：2011-08-02

申请号：US11796369

申请日：2007-04-27

申请人： Chun-Chieh Lin ,  Wei-Hua Hsu ,  Yu-En Percy Chang ,  Chung Li Chang ,  Chi-Feng Cheng ,  Win Hung ,  Kishimoto Ko

发明人： Chun-Chieh Lin ,  Wei-Hua Hsu ,  Yu-En Percy Chang ,  Chung Li Chang ,  Chi-Feng Cheng ,  Win Hung ,  Kishimoto Ko

IPC分类号： H01L29/78

CPC分类号： H01L29/665 ,  H01L29/165 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7833 ,  H01L29/7848

摘要： A semiconductor structure and methods for forming the same are provided. The semiconductor structure includes a semiconductor substrate; a gate stack on the semiconductor substrate; a SiGe region in the semiconductor substrate and adjacent the gate stack, wherein the SiGe region has a first atomic percentage of germanium to germanium and silicon; and a silicide region over the SiGe region. The silicide region has a second atomic percentage of germanium to germanium and silicon. The second atomic percentage is substantially lower than the first atomic percentage.

摘要翻译： 提供半导体结构及其形成方法。 半导体结构包括半导体衬底; 半导体衬底上的栅极堆叠; SiGe区域，其中SiGe区域具有锗到锗和硅的第一原子百分比; 以及SiGe区域上的硅化物区域。 硅化物区域具有锗与锗和硅的第二原子百分比。 第二原子百分比基本上低于第一原子百分数。

公开(公告)号：US09704865B2

公开(公告)日：2017-07-11

申请号：US14969319

申请日：2015-12-15

申请人： Hyungjong Lee ,  Wei-Hua Hsu ,  Junggun You ,  Choongho Lee

发明人： Hyungjong Lee ,  Wei-Hua Hsu ,  Junggun You ,  Choongho Lee

IPC分类号： H01L27/092 ,  H01L29/423 ,  H01L23/532 ,  H01L23/535 ,  H01L21/8238

CPC分类号： H01L27/0924 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823871 ,  H01L23/53209 ,  H01L23/535 ,  H01L29/0847 ,  H01L29/41783 ,  H01L29/42356 ,  H01L29/665 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

摘要： Semiconductor devices, having dual silicides, include a first fin, having N-type impurities, and a second fin, having P-type impurities, on a substrate. A first gate electrode and a first source/drain area are on the first fin. A second gate electrode and a second source/drain area are on the second fin. An etch stop layer is on the first source/drain area and the second source/drain area. An insulating layer is on the etch stop layer. A first plug connected to the first source/drain area and a second plug connected to the second source/drain area are formed through the insulating layer and the etch stop layer. A first metal silicide layer is in the first source/drain area. A second metal silicide layer having a material different from the first metal silicide layer and having a thickness smaller than the first metal silicide layer is in the second source/drain area.

公开(公告)号：US07157215B2

公开(公告)日：2007-01-02

申请号：US10892751

申请日：2004-07-15

申请人： Shun-Li Lin ,  Wei-Hua Hsu

发明人： Shun-Li Lin ,  Wei-Hua Hsu

IPC分类号： G03F7/20 ,  G03F7/00 ,  G03F7/04

CPC分类号： G03F7/2006

摘要： A photoresist with adjustable polarized light response and a photolithography process using the photoresist. The photoresist and the photolithography process are suitable for use in an exposure optical system with a high numerical aperture. The photoresist includes a photosensitive polymer that can absorb the exposure light source to generate an optical reaction. The photosensitive polymer can also be oriented along a direction of an electric field or a magnetic field. The response for the photosensitive upon a polarized light is determined by an angle between the predetermined direction and the polarized light. In addition, the photolithography process adjusts the orientation of the photosensitive polymer, so that the P-polarized light has a weaker response than that of the S-polarized light to compensate for the larger transmission coefficient of the P-polarized light with a high numerical aperture, so as to prevent the photoresist pattern deformation.

摘要翻译： 具有可调偏振光响应的光致抗蚀剂和使用光致抗蚀剂的光刻工艺。 光致抗蚀剂和光刻工艺适用于具有高数值孔径的曝光光学系统。 光致抗蚀剂包括可以吸收曝光光源以产生光学反应的光敏聚合物。 感光性聚合物也可以沿着电场或磁场的方向取向。 偏振光下的感光度的响应由预定方向和偏振光之间的角度确定。 此外，光刻工艺调整光敏聚合物的取向，使得P偏振光的响应弱于S偏振光，以补偿具有高数值的P偏振光的较大透射系数 孔径，以防止光致抗蚀剂图案变形。

公开(公告)号：US06576407B2

公开(公告)日：2003-06-10

申请号：US09840996

申请日：2001-04-25

申请人： Shun-Li Lin ,  Wei-Hua Hsu

发明人： Shun-Li Lin ,  Wei-Hua Hsu

IPC分类号： G03F720

CPC分类号： G03F7/70566 ,  G03F7/2006

摘要： A photoresist layer comprising an optically active component is provided, so that after an incident linearly polarized light penetrates the photoresist layer, the intensity ratio of an S wave polarization and a P wave polarization divided from the linearly polarized light is effectively 1:1 so improving astigmatism.