公开(公告)号：US08492777B2

公开(公告)日：2013-07-23

申请号：US13078933

申请日：2011-04-02

申请人： Chung-Chuan Hsieh ,  Yi-Chun Chen ,  Yi-Ting Chiu

发明人： Chung-Chuan Hsieh ,  Yi-Chun Chen ,  Yi-Ting Chiu

IPC分类号： H01L33/00

CPC分类号： H01L25/0753 ,  H01L33/486 ,  H01L33/62 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/00

摘要： A light emitting diode (LED) package includes a LED package substrate, first LED chips and second LED chips. The LED package substrate includes a substrate, a first bonding pad, second bonding pads and a third bonding pad. The first, second and third bonding pads are disposed on the substrate. The second bonding pads are arranged in an array. The first and third bonding pads are located adjacent respectively to first and last column of the array. The first LED chips are die-bonded on the first bonding pad and wire-bonded respectively to the second bonding pads arranged in first column of the array. The second LED chips are die-bonded on the second bonding pads respectively. In each row except last column, each second LED chip is wire-bonded to the second bonding pad arranged in next column. The second LED chips located in last column are wire-bonded to the third bonding pad.

摘要翻译： 发光二极管（LED）封装包括LED封装基板，第一LED芯片和第二LED芯片。 LED封装衬底包括衬底，第一焊盘，第二接合焊盘和第三接合焊盘。 第一，第二和第三接合焊盘设置在基板上。 第二接合焊盘被布置成阵列。 第一和第三接合焊盘分别位于阵列的第一列和最后一列。 第一LED芯片在第一焊盘上被芯片焊接并分别引线接合到布置在阵列的第一列中的第二焊盘。 第二LED芯片分别在第二焊盘上进行裸片焊接。 在除了最后一列之外的每行中，每个第二LED芯片被引线键合到布置在下一列中的第二焊盘。 位于最后一列的第二LED芯片被引线接合到第三焊盘。

公开(公告)号：US20110248289A1

公开(公告)日：2011-10-13

申请号：US13078933

申请日：2011-04-02

申请人： Chung-Chuan Hsieh ,  Yi-Chun Chen ,  Yi-Ting Chiu

发明人： Chung-Chuan Hsieh ,  Yi-Chun Chen ,  Yi-Ting Chiu

IPC分类号： H01L33/08 ,  H01L33/62

CPC分类号： H01L25/0753 ,  H01L33/486 ,  H01L33/62 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/00

摘要： A light emitting diode (LED) package includes a LED package substrate, first LED chips and second LED chips. The LED package substrate includes a substrate, a first bonding pad, second bonding pads and a third bonding pad. The first, second and third bonding pads are disposed on the substrate. The second bonding pads are arranged in an array. The first and third bonding pads are located adjacent respectively to first and last column of the array. The first LED chips are die-bonded on the first bonding pad and wire-bonded respectively to the second bonding pads arranged in first column of the array. The second LED chips are die-bonded on the second bonding pads respectively. In each row except last column, each second LED chip is wire-bonded to the second bonding pad arranged in next column. The second LED chips located in last column are wire-bonded to the third bonding pad.

摘要翻译： 发光二极管（LED）封装包括LED封装基板，第一LED芯片和第二LED芯片。 LED封装衬底包括衬底，第一焊盘，第二接合焊盘和第三接合焊盘。 第一，第二和第三接合焊盘设置在基板上。 第二接合焊盘被布置成阵列。 第一和第三接合焊盘分别位于阵列的第一列和最后一列。 第一LED芯片在第一焊盘上被芯片焊接并分别引线接合到布置在阵列的第一列中的第二焊盘。 第二LED芯片分别在第二焊盘上进行裸片焊接。 在除了最后一列之外的每行中，每个第二LED芯片被引线键合到布置在下一列中的第二焊盘。 位于最后一列的第二LED芯片被引线接合到第三焊盘。

公开(公告)号：US07872726B2

公开(公告)日：2011-01-18

申请号：US12242936

申请日：2008-10-01

申请人： Chun-Huang Lu ,  Yi-Ting Chiu ,  Hsiu-Chih Tseng ,  Chun-Ying Huang ,  Hsiao-Sheng Chen

发明人： Chun-Huang Lu ,  Yi-Ting Chiu ,  Hsiu-Chih Tseng ,  Chun-Ying Huang ,  Hsiao-Sheng Chen

IPC分类号： G02F1/1333

CPC分类号： G02F1/136204

摘要： An active device array mother substrate including a substrate, a plurality of active device arrays, a plurality of common bus lines, at least one first transparent conductive pattern layer, and at least one second transparent conductive pattern layer is provided. The substrate has a plurality of predetermined areas, and the active device arrays are respectively disposed in the predetermined areas. The common bus lines are respectively disposed in the predetermined areas to surround the active device arrays. The first transparent conductive pattern layer is connected or coupled between adjacent two common bus lines. The second transparent conductive pattern layer is extended to the adjacent predetermined area to be connected or coupled to the adjacent common bus line.

摘要翻译： 提供了包括基板，多个有源器件阵列，多个公共总线，至少一个第一透明导电图案层和至少一个第二透明导电图案层的有源器件阵列母基板。 衬底具有多个预定区域，并且有源器件阵列分别设置在预定区域中。 公共总线分别设置在预定区域中以包围有源器件阵列。 第一透明导电图案层在相邻的两条公共总线之间连接或耦合。 第二透明导电图案层被延伸到相邻的预定区域以被连接或耦合到相邻的公共总线。

公开(公告)号：US20090225269A1

公开(公告)日：2009-09-10

申请号：US12242936

申请日：2008-10-01

申请人： Chun-Huang Lu ,  Yi-Ting Chiu ,  Hsiu-Chih Tseng ,  Chun-Ying Huang ,  Hsiao-Sheng Chen

发明人： Chun-Huang Lu ,  Yi-Ting Chiu ,  Hsiu-Chih Tseng ,  Chun-Ying Huang ,  Hsiao-Sheng Chen

IPC分类号： G02F1/1333

CPC分类号： G02F1/136204

摘要： An active device array mother substrate including a substrate, a plurality of active device arrays, a plurality of common bus lines, at least one first transparent conductive pattern layer, and at least one second transparent conductive pattern layer is provided. The substrate has a plurality of predetermined areas, and the active device arrays are respectively disposed in the predetermined areas. The common bus lines are respectively disposed in the predetermined areas to surround the active device arrays. The first transparent conductive pattern layer is connected or coupled between adjacent two common bus lines. The second transparent conductive pattern layer is extended to the adjacent predetermined area to be connected or coupled to the adjacent common bus line.

摘要翻译： 提供了包括基板，多个有源器件阵列，多个公共总线，至少一个第一透明导电图案层和至少一个第二透明导电图案层的有源器件阵列母基板。 衬底具有多个预定区域，并且有源器件阵列分别设置在预定区域中。 公共总线分别设置在预定区域中以包围有源器件阵列。 第一透明导电图案层在相邻的两条公共总线之间连接或耦合。 第二透明导电图案层被延伸到相邻的预定区域以被连接或耦合到相邻的公共总线。