公开(公告)号：US20150301077A1

公开(公告)日：2015-10-22

申请号：US14686834

申请日：2015-04-15

Applicant: Cirrus Logic, Inc.

Inventor： John L. Melanson ,  Anindya Bhattacharya ,  Roderick D. Holley ,  Ruoxin Jiang ,  Stephen T. Hodapp ,  John C. Tucker

IPC: G01P15/125

CPC classification number: G01P15/125

Abstract: In accordance with embodiments of the present disclosure, an apparatus for measuring acceleration may include a spring-mounted mass, a positional encoder configured to measure a position of the spring-mounted mass and output one or more signals indicative of a sine and a cosine of the position, a driver to set and maintain an oscillation of the spring-mounted mass, and a decoder configured to process the one or more signals to calculate an acceleration of the spring-mounted mass.

Abstract translation: 根据本公开的实施例，用于测量加速度的装置可以包括弹簧安装的质量块，位置编码器被配置为测量弹簧安装质量块的位置，并输出一个或多个指示正弦和余弦的信号 所述位置，设置和保持所述弹簧安装的质量的振荡的驱动器，以及被配置为处理所述一个或多个信号以计算所述弹簧安装的质量块的加速度的解码器。

公开(公告)号：US10571484B2

公开(公告)日：2020-02-25

申请号：US14686834

申请日：2015-04-15

Applicant: Cirrus Logic, Inc.

Inventor： John L. Melanson ,  Anindya Bhattacharya ,  Roderick D. Holley ,  Ruoxin Jiang ,  Stephen T. Hodapp ,  John C. Tucker

IPC: G01P15/125

Abstract: In accordance with embodiments of the present disclosure, an apparatus for measuring acceleration may include a spring-mounted mass, a positional encoder configured to measure a position of the spring-mounted mass and output one or more signals indicative of a sine and a cosine of the position, a driver to set and maintain an oscillation of the spring-mounted mass, and a decoder configured to process the one or more signals to calculate an acceleration of the spring-mounted mass.

公开(公告)号：US10033390B2

公开(公告)日：2018-07-24

申请号：US14747068

申请日：2015-06-23

Applicant: Cirrus Logic, Inc.

Inventor： John L. Melanson ,  Roderick D. Holley ,  Jaimin Mehta

IPC: H01L35/00 ,  H01L37/00 ,  H03L1/02 ,  H03L7/099 ,  H03B5/32

Abstract: A system may include a sampling circuit, a temperature calibration system, a phase detector, a virtual phase-locked loop, and a sample rate converter. The sampling circuit may be configured to generate a series of digitally-sampled data at a sampling frequency provided by a local clock. The temperature calibration system may be configured to determine a temperature-based timing compensation with respect to the local clock. The phase detector may be configured to estimate an error of the local clock in view of the reference clock. The virtual phase-locked loop may be configured to generate a virtual clock based on the temperature-based timing compensation and the error. The sample rate converter may be configured to generate a corrected series of digitally-sampled data in response to the virtual clock by interpolating the series of digitally-sampled data to correct for the error.

公开(公告)号：US20150372681A1

公开(公告)日：2015-12-24

申请号：US14747068

申请日：2015-06-23

Applicant: Cirrus Logic, Inc.

Inventor： John L. Melanson ,  Roderick D. Holley ,  Jaimin Mehta

IPC: H03L1/02 ,  H03B5/32 ,  H03L7/099

CPC classification number: H03L1/028 ,  H03B5/32 ,  H03L1/026 ,  H03L7/0991

Abstract: A system may include a sampling circuit, a temperature calibration system, a phase detector, a virtual phase-locked loop, and a sample rate converter. The sampling circuit may be configured to generate a series of digitally-sampled data at a sampling frequency provided by a local clock. The temperature calibration system may be configured to determine a temperature-based timing compensation with respect to the local clock. The phase detector may be configured to estimate an error of the local clock in view of the reference clock. The virtual phase-locked loop may be configured to generate a virtual clock based on the temperature-based timing compensation and the error. The sample rate converter may be configured to generate a corrected series of digitally-sampled data in response to the virtual clock by interpolating the series of digitally-sampled data to correct for the error.

Abstract translation: 系统可以包括采样电路，温度校准系统，相位检测器，虚拟锁相环和采样率转换器。 采样电路可以被配置为以由本地时钟提供的采样频率生成一系列数字采样数据。 温度校准系统可以被配置为确定相对于本地时钟的基于温度的定时补偿。 相位检测器可以被配置为考虑到参考时钟来估计本地时钟的误差。 虚拟锁相环可以被配置为基于基于温度的定时补偿和误差来生成虚拟时钟。 采样率转换器可以被配置为通过内插一系列数字采样数据来校正错误来产生响应于虚拟时钟的经校正的数字采样数据序列。