公开(公告)号：US20230371169A1

公开(公告)日：2023-11-16

申请号：US18357440

申请日：2023-07-24

Applicant: Cisco Technology, Inc.

Inventor： Shadi Ebrahimi Asl ,  Stephen Aubrey Scearce ,  Quinn Gaumer ,  Linda W. Scott

IPC: H05K1/02 ,  H05K3/00 ,  H05K1/11 ,  H05K1/18 ,  H05K3/42 ,  H05K3/30

CPC classification number: H05K1/0218 ,  H05K3/0047 ,  H05K1/115 ,  H05K1/0298 ,  H05K1/181 ,  H05K3/42 ,  H05K3/303 ,  H05K1/0219 ,  H05K2201/10015 ,  H05K1/0245 ,  H05K1/0231

Abstract: A multilayer printed circuit board having a stackup including an upper half of the stackup and a lower half of the stackup, the multilayer printed circuit board having a top exposed surface and a bottom exposed surface, a first trace and via structure, having one portion disposed on the top exposed surface and another portion disposed within the upper half of the stackup, a second trace and via structure, having one portion disposed on the top exposed surface and another portion disposed within the upper half of the stackup, and first electrical components and second electrical components disposed on the top exposed surface of the multilayer printed circuit board and associated, respectively, with the first trace and via structure and the second trace and via structure, wherein the first electrical components are mounted orthogonally with respect to the second electrical components.

公开(公告)号：US11785706B2

公开(公告)日：2023-10-10

申请号：US17335591

申请日：2021-06-01

Applicant: Cisco Technology, Inc.

Inventor： Shadi Ebrahimi Asl ,  Stephen Aubrey Scearce ,  Quinn Gaumer ,  Linda W. Scott

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/18 ,  H05K3/00 ,  H05K3/30 ,  H05K3/42

CPC classification number: H05K1/0218 ,  H05K1/0298 ,  H05K1/115 ,  H05K1/181 ,  H05K3/0047 ,  H05K3/303 ,  H05K3/42 ,  H05K1/0219 ,  H05K1/0231 ,  H05K1/0245 ,  H05K2201/10015

Abstract: A multilayer printed circuit board having a stackup including an upper half of the stackup and a lower half of the stackup, the multilayer printed circuit board having a top exposed surface and a bottom exposed surface, a first trace and via structure, having one portion disposed on the top exposed surface and another portion disposed within the upper half of the stackup, a second trace and via structure, having one portion disposed on the top exposed surface and another portion disposed within the upper half of the stackup, and first electrical components and second electrical components disposed on the top exposed surface of the multilayer printed circuit board and associated, respectively, with the first trace and via structure and the second trace and via structure, wherein the first electrical components are mounted orthogonally with respect to the second electrical components.

公开(公告)号：US12225658B2

公开(公告)日：2025-02-11

申请号：US18357440

申请日：2023-07-24

Applicant: Cisco Technology, Inc.

Inventor： Shadi Ebrahimi Asl ,  Stephen Aubrey Scearce ,  Quinn Gaumer ,  Linda W. Scott

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/18 ,  H05K3/00 ,  H05K3/30 ,  H05K3/42

Abstract: A multilayer printed circuit board having a stackup including an upper half of the stackup and a lower half of the stackup, the multilayer printed circuit board having a top exposed surface and a bottom exposed surface, a first trace and via structure, having one portion disposed on the top exposed surface and another portion disposed within the upper half of the stackup, a second trace and via structure, having one portion disposed on the top exposed surface and another portion disposed within the upper half of the stackup, and first electrical components and second electrical components disposed on the top exposed surface of the multilayer printed circuit board and associated, respectively, with the first trace and via structure and the second trace and via structure, wherein the first electrical components are mounted orthogonally with respect to the second electrical components.

公开(公告)号：US20220386452A1

公开(公告)日：2022-12-01

申请号：US17335591

申请日：2021-06-01

Applicant: Cisco Technology, Inc.

Inventor： Shadi Ebrahimi Asl ,  Stephen Aubrey Scearce ,  Quinn Gaumer ,  Linda W. Scott

IPC: H05K1/02 ,  H05K1/18 ,  H05K1/11 ,  H05K3/00 ,  H05K3/30 ,  H05K3/42

Abstract: A multilayer printed circuit board having a stackup including an upper half of the stackup and a lower half of the stackup, the multilayer printed circuit board having a top exposed surface and a bottom exposed surface, a first trace and via structure, having one portion disposed on the top exposed surface and another portion disposed within the upper half of the stackup, a second trace and via structure, having one portion disposed on the top exposed surface and another portion disposed within the upper half of the stackup, and first electrical components and second electrical components disposed on the top exposed surface of the multilayer printed circuit board and associated, respectively, with the first trace and via structure and the second trace and via structure, wherein the first electrical components are mounted orthogonally with respect to the second electrical components.