公开(公告)号：US20140318935A1

公开(公告)日：2014-10-30

申请号：US14316596

申请日：2014-06-26

Applicant: Colin Johnstone

Inventor： Colin Johnstone

IPC: H01H35/14

CPC classification number: H01H35/143 ,  F16K17/36 ,  H01H35/027 ,  H01H35/146 ,  Y10T137/0753 ,  Y10T137/0874 ,  Y10T137/0923

Abstract: An actuator that includes a shelf having a pivot cone, a first member, a second member, a trigger pin and a trigger lever latch. The first member includes a weight, a first shaft extending upwardly from the weight and through an opening in the pivot cone, and a first plate affixed to the first shaft. The first plate is supported by the pivot cone. The second member includes a second plate resting on the first plate and a second shaft extending upwardly from the second plate. The trigger lever latch includes a first portion connected to the second shaft and a second portion extending upwardly at an angle away from the first portion. The trigger pin has an engagement surface. The trigger pin is movable between an operational state and a tripped state. The second end of the trigger lever latch is engaged with the engagement surface.

Abstract translation: 一种致动器，其包括具有枢转锥体，第一构件，第二构件，触发销和触发器杆闩锁的搁架。 第一构件包括重物，从重物向上延伸并通过枢转锥体中的开口的第一轴和固定到第一轴的第一板。 第一个板由枢轴锥体支撑。 第二构件包括搁置在第一板上的第二板和从第二板向上延伸的第二轴。 触发杆闩锁包括连接到第二轴的第一部分和与远离第一部分成一定角度向上延伸的第二部分。 触发销具有接合表面。 触发销可在操作状态和跳闸状态之间移动。 触发杆闩锁的第二端与接合表面接合。

公开(公告)号：US20060256641A1

公开(公告)日：2006-11-16

申请号：US11418552

申请日：2006-05-05

Applicant: Colin Johnstone

Inventor： Colin Johnstone

IPC: G11C8/00

CPC classification number: G11C7/1072 ,  G01R19/2509 ,  G06F17/18 ,  G11C7/1075

Abstract: A dual port memory is updated at substantially the same data sampling rate as a clock frequency of the dual port memory. The dual port memory stores data relating to each different parameter value in a stream of data samples, and provides the stored data from an address in the memory corresponding to the received parameter value. An updating element updates stored data and provides the updated data to an input of the dual port memory for writing back into the address corresponding to the received parameter value. A first port of the dual port memory is utilised as the output of the dual port memory coupled to the input of the updating element on a first clock cycle of the dual port memory, and a second port of the dual port memory is normally utilised as the input of the dual port memory coupled to the output of the updating element on a second clock cycle, the next address being accessed via the first port on the second clock cycle. A comparator receives the parameter value on the first clock cycle of the dual port memory and a next received parameter value on a second clock cycle, and provides a match signal if the received parameter value and the next received parameter value are the same. The match signal is utilised to enable the first port of the dual port memory to be used as the input for the second clock cycle so that the data updated by the updating element on the first clock cycle is provided at the first port rather than the second port and is therefore correctly provided to the input of the updating element on the second clock cycle.

Abstract translation: 以与双端口存储器的时钟频率基本相同的数据采样率来更新双端口存储器。 双端口存储器存储与数据样本流中的每个不同参数值相关的数据，并且从对应于接收到的参数值的存储器中的地址提供存储的数据。 更新元件更新存储的数据，并将更新的数据提供给双端口存储器的输入，以便写回到与所接收的参数值对应的地址中。 双端口存储器的第一端口被用作在双端口存储器的第一时钟周期耦合到更新元件的输入的双端口存储器的输出，并且双端口存储器的第二端口通常用作 所述双端口存储器的输入在第二时钟周期耦合到所述更新元件的输出，所述下一个地址在所述第二时钟周期经由所述第一端口访问。 比较器在第二时钟周期中接收双端口存储器的第一时钟周期上的参数值和下一个接收到的参数值，并且如果接收到的参数值和下一个接收的参数值相同，则提供匹配信号。 匹配信号用于使双端口存储器的第一端口用作第二时钟周期的输入，使得在第一时钟周期由更新元件更新的数据被提供在第一端口而不是第二端口 端口，因此在第二时钟周期上正确地提供给更新元件的输入。

公开(公告)号：US09449773B2

公开(公告)日：2016-09-20

申请号：US14316596

申请日：2014-06-26

Applicant: Colin Johnstone

Inventor： Colin Johnstone

IPC: H01H35/14 ,  F16K17/36 ,  H01H35/02

CPC classification number: H01H35/143 ,  F16K17/36 ,  H01H35/027 ,  H01H35/146 ,  Y10T137/0753 ,  Y10T137/0874 ,  Y10T137/0923

Abstract: An actuator that includes a shelf having a pivot cone, a first member, a second member, a trigger pin and a trigger lever latch. The first member includes a weight, a first shaft extending upwardly from the weight and through an opening in the pivot cone, and a first plate affixed to the first shaft. The first plate is supported by the pivot cone. The second member includes a second plate resting on the first plate and a second shaft extending upwardly from the second plate. The trigger lever latch includes a first portion connected to the second shaft and a second portion extending upwardly at an angle away from the first portion. The trigger pin has an engagement surface. The trigger pin is movable between an operational state and a tripped state. The second end of the trigger lever latch is engaged with the engagement surface.

Abstract translation: 一种致动器，其包括具有枢转锥体，第一构件，第二构件，触发销和触发器杆闩锁的搁架。 第一构件包括重物，从重物向上延伸并通过枢转锥体中的开口的第一轴和固定到第一轴的第一板。 第一个板由枢轴锥体支撑。 第二构件包括搁在第一板上的第二板和从第二板向上延伸的第二轴。 触发杆闩锁包括连接到第二轴的第一部分和与远离第一部分成一定角度向上延伸的第二部分。 触发销具有接合表面。 触发销可在操作状态和跳闸状态之间移动。 触发杆闩锁的第二端与接合表面接合。

公开(公告)号：US08766118B2

公开(公告)日：2014-07-01

申请号：US13298217

申请日：2011-11-16

Applicant: Colin Johnstone

Inventor： Colin Johnstone

IPC: H01H3/16

CPC classification number: H01H35/143 ,  F16K17/36 ,  H01H35/027 ,  H01H35/146 ,  Y10T137/0753 ,  Y10T137/0874 ,  Y10T137/0923

Abstract: An actuator that includes a shelf having a pivot cone, a first member, a second member, a trigger pin and a trigger lever latch. The first member includes a weight, a first shaft extending upwardly from the weight and through an opening in the pivot cone, and a first plate affixed to the first shaft. The first plate is supported by the pivot cone. The second member includes a second plate resting on the first plate and a second shaft extending upwardly from the second plate. The trigger lever latch includes a first portion connected to the second shaft and a second portion extending upwardly at an angle away from the first portion. The trigger pin has an engagement surface. The trigger pin is movable between an operational state and a tripped state. The second end of the trigger lever latch is engaged with the engagement surface.

Abstract translation: 一种致动器，其包括具有枢转锥体，第一构件，第二构件，触发销和触发器杆闩锁的搁架。 第一构件包括重物，从重物向上延伸并通过枢转锥体中的开口的第一轴和固定到第一轴的第一板。 第一个板由枢轴锥体支撑。 第二构件包括搁置在第一板上的第二板和从第二板向上延伸的第二轴。 触发杆闩锁包括连接到第二轴的第一部分和与远离第一部分成一定角度向上延伸的第二部分。 触发销具有接合表面。 触发销可在操作状态和跳闸状态之间移动。 触发杆闩锁的第二端与接合表面接合。

公开(公告)号：US07277820B2

公开(公告)日：2007-10-02

申请号：US11418540

申请日：2006-05-04

Applicant: Colin Johnstone ,  Eric Breakenridge

Inventor： Colin Johnstone ,  Eric Breakenridge

IPC: G06F19/00

CPC classification number: G06F17/18 ,  G11C7/16

Abstract: In apparatus for generating a Complementary Cumulative Distribution Function (CCDF) curve for an input signal, an analog to digital converter (ADC) samples the input signal at sampling points to provide a parameter value corresponding to a desired parameter of the input signal at each sampled point. A memory element provides a frequency count of occurrence of each received parameter value from an address in the memory corresponding to the received parameter value. An adder receives the frequency count, increments the count and provides the incremented count to an input of the memory element for writing back into the address corresponding to the received parameter value. A CCDF curve generating module reads the frequency count stored in the memory element corresponding to each parameter value and generates a CCDF curve therefrom.

Abstract translation: 在用于产生输入信号的互补累积分布函数（CCDF）曲线的装置中，模数转换器（ADC）在采样点对输入信号进行采样，以在每个采样时提供与输入信号的期望参数相对应的参数值 点。 存储器元件根据接收的参数值从存储器中的地址提供每个接收到的参数值的频率计数。 加法器接收频率计数，增加计数，并将递增的计数提供给存储器元件的输入，以便写入与接收的参数值对应的地址。 CCDF曲线生成模块读取与每个参数值对应的存储元件中存储的频率计数，并从其生成CCDF曲线。

公开(公告)号：US06765874B1

公开(公告)日：2004-07-20

申请号：US09709395

申请日：2000-11-13

Applicant: Norman Carder ,  Colin Johnstone

Inventor： Norman Carder ,  Colin Johnstone

IPC: G01R3108

CPC classification number: H04Q11/0478 ,  H04L2012/5627 ,  H04L2012/5628

Abstract: A data analyzer system measures the duration of a service disruption event in an asynchronous transfer mode (ATM) data transmission channel carrying an ATM stream of identifiable data cells in a defined order. The data analyzer system determines whether or not any of the data cells have been corrupted in transmission through the data transmission channel during transmission disruption. A timer determines a service disruption event duration upon elapse of a predetermined guard time.

Abstract translation: 数据分析器系统以定义的顺序测量异步传输模式（ATM）数据传输信道中承载ATM流的可识别数据信元的服务中断事件的持续时间。 在传输中断期间，数据分析器系统确定在通过数据传输通道的传输中是否有任何数据单元已被破坏。 定时器在经过预定保护时间后确定服务中断事件持续时间。

公开(公告)号：US07366049B2

公开(公告)日：2008-04-29

申请号：US11418552

申请日：2006-05-04

Applicant: Colin Johnstone

Inventor： Colin Johnstone

IPC: G11C8/00 ,  G11C7/06

CPC classification number: G11C7/1072 ,  G01R19/2509 ,  G06F17/18 ,  G11C7/1075

Abstract: A dual port memory is updated at substantially the same data sampling rate as a clock frequency of the dual port memory. The dual port memory stores data relating to each different parameter value in a stream of data samples, and provides the stored data from an address in the memory corresponding to the received parameter value. An updating element updates stored data and provides the updated data to an input of the dual port memory for writing back into the address corresponding to the received parameter value. A first port of the dual port memory is utilised as the output of the dual port memory coupled to the input of the updating element on a first clock cycle of the dual port memory, and a second port of the dual port memory is normally utilised as the input of the dual port memory coupled to the output of the updating element on a second clock cycle, the next address being accessed via the first port on the second clock cycle. A comparator receives the parameter value on the first clock cycle of the dual port memory and a next received parameter value on a second clock cycle, and provides a match signal if the received parameter value and the next received parameter value are the same. The match signal is utilised to enable the first port of the dual port memory to be used as the input for the second clock cycle so that the data updated by the updating element on the first clock cycle is provided at the first port rather than the second port and is therefore correctly provided to the input of the updating element on the second clock cycle.

Abstract translation: 以与双端口存储器的时钟频率基本相同的数据采样率来更新双端口存储器。 双端口存储器存储与数据样本流中的每个不同参数值相关的数据，并且从对应于接收到的参数值的存储器中的地址提供存储的数据。 更新元件更新存储的数据，并将更新的数据提供给双端口存储器的输入，以便写回到与所接收的参数值对应的地址中。 双端口存储器的第一端口被用作在双端口存储器的第一时钟周期耦合到更新元件的输入的双端口存储器的输出，并且双端口存储器的第二端口通常用作 所述双端口存储器的输入在第二时钟周期耦合到所述更新元件的输出，所述下一个地址在所述第二时钟周期经由所述第一端口访问。 比较器在第二时钟周期中接收双端口存储器的第一时钟周期上的参数值和下一个接收到的参数值，并且如果接收到的参数值和下一个接收的参数值相同，则提供匹配信号。 匹配信号用于使双端口存储器的第一端口用作第二时钟周期的输入，使得在第一时钟周期由更新元件更新的数据被提供在第一端口而不是第二端口 端口，因此在第二时钟周期上正确地提供给更新元件的输入。

公开(公告)号：US20060259257A1

公开(公告)日：2006-11-16

申请号：US11418540

申请日：2006-05-04

Applicant: Colin Johnstone ,  Eric Breakenridge

Inventor： Colin Johnstone ,  Eric Breakenridge

IPC: G06F19/00

CPC classification number: G06F17/18 ,  G11C7/16

Abstract: In apparatus for generating a Complementary Cumulative Distribution Function (CCDF) curve for an input signal, an analog to digital converter (ADC) samples the input signal at sampling points to provide a parameter value corresponding to a desired parameter of the input signal at each sampled point. A memory element provides a frequency count of occurrence of each received parameter value from an address in the memory corresponding to the received parameter value. An adder receives the frequency count, increments the count and provides the incremented count to an input of the memory element for writing back into the address corresponding to the received parameter value. A CCDF curve generating module reads the frequency count stored in the memory element corresponding to each parameter value and generates a CCDF curve therefrom.

Abstract translation: 在用于产生输入信号的互补累积分布函数（CCDF）曲线的装置中，模数转换器（ADC）在采样点对输入信号进行采样，以在每个采样时提供与输入信号的期望参数相对应的参数值 点。 存储器元件根据接收的参数值从存储器中的地址提供每个接收到的参数值的频率计数。 加法器接收频率计数，增加计数，并将递增的计数提供给存储器元件的输入，以便写入与接收的参数值对应的地址。 CCDF曲线生成模块读取与每个参数值对应的存储元件中存储的频率计数，并从其生成CCDF曲线。

公开(公告)号：US20060199497A1

公开(公告)日：2006-09-07

申请号：US11262432

申请日：2005-10-28

Applicant: Peter Smith ,  Curtis Berry ,  Colin Johnstone ,  Paul Ashley

Inventor： Peter Smith ,  Curtis Berry ,  Colin Johnstone ,  Paul Ashley

IPC: A47J47/00

CPC classification number: F24F9/00 ,  F24F11/77 ,  F25D23/023 ,  F25D2700/02

Abstract: A conditioned vestibule for a cold storage doorway is provided having a trackless, bi-folding door operated by an actuator that rotates a first arm portion. The first arm portion rotates about a first end. A second arm portion is connected pivotally to a second end of the first arm portion at a hinge. The second arm portion rotates relative to the first arm portion at the hinge, in response to movement of the actuator. A door body is connected to at least one of the first and second arm portions. In one embodiment, the vestibule further includes an air curtain, including a fan that circulates air across a doorway opening across into which the first and second arm portions extend, a discharge means that discharges the air across the opening, and a return means that communicates discharged air to the fan.

Abstract translation: 提供了一种用于冷藏门口的调节前庭，其具有无转轨双折门，该门由致动器操作，所述致动器使第一臂部旋转。 第一臂部围绕第一端旋转。 第二臂部分以铰链枢转地连接到第一臂部分的第二端。 响应于致动器的移动，第二臂部分在铰链处相对于第一臂部分旋转。 门体连接到第一和第二臂部分中的至少一个。 在一个实施例中，前庭还包括一个空气幕，包括一个风扇，该风扇使空气循环穿过第一和第二臂部分延伸到的门口开口，排出装置，其通过开口排出空气;以及返回装置， 将空气排放到风扇。

公开(公告)号：US20060176082A1

公开(公告)日：2006-08-10

申请号：US11299431

申请日：2005-12-12

Applicant: Colin Johnstone ,  Eric Breakenridge

Inventor： Colin Johnstone ,  Eric Breakenridge

IPC: G01N30/86

CPC classification number: H03K5/1252 ,  H03K5/084 ,  H03K5/1534

Abstract: An apparatus and method for detecting leading pulse edges of a signal includes a controller, hysteresis threshold comparators and qualification timers. The controller uses the outputs from the timers in order to determine whether or not a transition of the input signal constitutes a leading pulse edge of the input signal.

Abstract translation: 用于检测信号的引导脉冲沿的装置和方法包括控制器，滞后阈值比较器和限定定时器。 控制器使用来自定时器的输出来确定输入信号的转换是否构成输入信号的前导脉冲沿。